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WM8974 датащи(PDF) 47 Page - Wolfson Microelectronics plc

номер детали WM8974
подробное описание детали  MONO CODEC WITH SPEAKER DRIVER
PDF  63 Pages
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производитель  WOLFSON [Wolfson Microelectronics plc]
домашняя страница  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8974 датащи(HTML) 47 Page - Wolfson Microelectronics plc

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WM8974
w
PP Rev 1.1 September 2004
47
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R7
Additional
control
3:1
SR
000
Approximate sample rate (configures the
coefficients for the internal digital filters):
000=48kHz
001=32kHz
010=24kHz
011=16kHz
100=12kHz
101=8kHz
110-111=reserved
Table 36 Sample Rate Control
MASTER CLOCK AND PHASE LOCKED LOOP (PLL)
The WM8974 has an on-chip phase-locked loop (PLL) circuit that can be used to:
Generate master clocks for the WM8974 audio functions from another external clock, e.g. in
telecoms applications.
Generate and output (on pin CSB/GPIO) a clock for another part of the system that is derived from
an existing audio master clock.
Figure 25 shows the PLL and internal clocking arrangment on the WM8974.
The PLL can be enabled or disabled by the PLLEN register bit.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R1
Power
management 1
5
PLLEN
0
PLL enable
0=PLL off
1=PLL on
Table 37 PLLEN Control Bit
Figure 25 PLL and Clock Select Circuit



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