поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

IR3093M датащи(PDF) 2 Page - International Rectifier

номер детали IR3093M
подробное описание детали  3 PHASE OPTERON, ATHLON, OR VR10.X CONTROL IC
PDF  39 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  IRF [International Rectifier]
домашняя страница  http://www.irf.com
Logo IRF - International Rectifier

IR3093M датащи(HTML) 2 Page - International Rectifier

  IR3093M Datasheet HTML 1Page - International Rectifier IR3093M Datasheet HTML 2Page - International Rectifier IR3093M Datasheet HTML 3Page - International Rectifier IR3093M Datasheet HTML 4Page - International Rectifier IR3093M Datasheet HTML 5Page - International Rectifier IR3093M Datasheet HTML 6Page - International Rectifier IR3093M Datasheet HTML 7Page - International Rectifier IR3093M Datasheet HTML 8Page - International Rectifier IR3093M Datasheet HTML 9Page - International Rectifier Next Button
Zoom Inzoom in Zoom Outzoom out
 2 / 39 page
background image
IR3093
Page 2 of 39
07/15/04
PIN DESCRIPTION
PIN#
PIN SYMBOL
PIN DESCRIPTION
1
VID3
Inputs to VID D to A Converter
2
VID4
Inputs to VID D to A Converter
3
ROSC
Connect a resistor to VOSNS- to program oscillator frequency and FB, OCSET, BBFB, and VDAC bias currents
4
VOSNS-
Remote Sense Input. Connect to ground at the Load.
5
OCSET
Programs the hiccup over-current threshold through an external resistor tied to VDAC and an internal current
source.
6
VDAC
Regulated voltage programmed by the VID inputs. Current Sensing and Over Current Protection are referenced
to this pin. Connect an external RC network to VOSNS- to program Dynamic VID slew rate.
7
VDRP
Buffered IIN signal. Connect an external RC network to FB to program converter output impedance
8
FB
Inverting input to the Error Amplifier. Converter output voltage is offset from the VDAC voltage through an
external resistor connected to the converter output voltage at the load and an internal current source. Bias
current is a function of ROSC. Also OVP sense
9
EAOUT
Output of the Error Amplifier
10
SS/DEL
Controls Converter Softstart, Power Good, and Over-Current Timing. Connect an external capacitor to LGND to
program the timing.
11
SCOMP2
Compensation for the Current Share control loop. Connect a capacitor to ground to set the control loop’s
bandwidth. Phase 2 is forced to match phase 1’s current.
12
SCOMP3
Compensation for the Current Share control loop. Connect a capacitor to ground to set the control loop’s
bandwidth. Phase 3 is forced to match phase 1’s current.
13
LGND
Local Ground and IC substrate connection
14
SETBIAS
External resistor to ground sets voltage at BIASOUT pin. Bias current is a function of ROSC.
15
VCC
Power for internal circuitry and source for BIASOUT regulator
16
CSINP3
Non-inverting input to the Phase 3 Current Sense Amplifier.
17
CSINM3
Inverting input to the Phase 3 Current Sense Amplifier.
18
BIASOUT
200mA open-looped regulated voltage set by SETBIAS for GATE drive bias.
19
PWRGD
Open Collector output that drives low during Softstart or any fault condition. Connect external pull-up.
20
CSINP2
Non-inverting input to the Phase 2 Current Sense Amplifier.
21
CSINM2
Inverting input to the Phase 2 Current Sense Amplifier.
22
VID_SEL
Ground Selects VR10.X VID, Float Selects OPTERON VID, VCC Selects ATHLON VID
23
VCCL3
Power for Phase 3 Low-Side Gate Driver.
24
GATEL3
Phase 3 Low-Side Gate Driver Output and input to GATEH3 non-overlap comparator.
25
PGND3
Return for Phase 3 Gate Drivers
26
GATEH3
Phase 3 High-Side Gate Driver Output and input to GATEL3 non-overlap comparator.
27
VCCH3
Power for Phase 3 High-Side Gate Driver
28
VCCH2
Power for Phase 2 High-Side Gate Driver
29
GATEH2
Phase 2 High-Side Gate Driver Output and input to GATEL2 non-overlap comparator.
30
PGND2
Return for Phase 2 Gate Drivers
31
GATEL2
Phase 2 Low-Side Gate Driver Output and input to GATEH2 non-overlap comparator.
32
5VUVL
Can be used to monitor the driver supply voltage or 5V supply voltage when converting from 5V. An under
voltage condition initiates Soft Start.
33
VCCL1_2
Power for Phase 1 and 2 Low-Side Gate Drivers.
34
GATEL1
Phase 1 Low-Side Gate Driver Output and input to GATEH1 non-overlap comparator.
35
PGND1
Return for Phase 1 Gate Drivers
36
GATEH1
Phase 1 High-Side Gate Driver Output and input to GATEL1 non-overlap comparator.
37
VCCH1
Power for Phase 1 High-Side Gate Driver
38
NC
Not connected
39
CSINM1
Inverting input to the Phase 1Current Sense Amplifier.
40
CSINP1
Non-inverting input to the Current Sense Amplifier.
41
OVP
Output that drives high during an Over-Voltage condition.
42
ENABLE
Enable Input. A logic low applied to this pin puts the IC into Fault mode.
43
OVPSNS
Dedicated output voltage sense pin for Over Voltage Protection.
44
5VREF
Compensation for internal voltage reference rail.
45
VID5
Inputs to VID D to A Converter
46
VID0
Inputs to VID D to A Converter
47
VID1
Inputs to VID D to A Converter
48
VID2
Inputs to VID D to A Converter



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com