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SSD1815 датащи(PDF) 11 Page - List of Unclassifed Manufacturers |
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SSD1815 датащи(HTML) 11 Page - List of Unclassifed Manufacturers |
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11 / 35 page ![]() SOLOMON SSD1815 11 REV 1.5 03/2000 LCD Driving Voltage Generator and Regulator This module generates the LCD voltage required for display driv- ing output. It takes a single supply input and generate necessary volt- age levels. This block consists of: 1. 2X, 3X and 4X DC-DC voltage converter The built-in DC-DC voltage converter is use to generate large neg- ative LCD driving voltage with reference to VDD from the voltage input (VSS1). For SSD1815, it is possible to produce 2X, 3X or 4X boosting from the protential different between VSS1 - VDD. Detail configurations of the DC-DC converter for different boosting multiples are given in Figure 6 at the right. 2. Voltage Regulator (Voltages referenced to VDD) The feedback gain control for LCD driving contrast curves can be selected by IRS pin to either internal (IRS pin = H) or external (IRS pin = L). For internal resistor network is enabled, there are eight setting can be set by software. If external control is selected, external resistors are required to be connected between VDD and VF (R1), and between VF and VL6 (R2). 3. Contrast Control (Voltages referenced to VDD) Software control of the 64 contrast voltage levels at each voltage regulator feedback gain. The equation of calculating the LCD driv- ing voltage is given as: where and 4. Bias Divider Divide the regulator output to give the LCD driving voltages (VL2 - VL5). A low power consumption circuit design in this bias divider saves most of the display current comparing to traditional design. 5. Bias Ratio Selection circuitry Software control of 1/7 and 1/9 bias ratio to match the characteris- tic of LCD panel. In addition, 1/4, 1/5, 1/6 and 1/8 bias ratios are also software selectable using the extended command for any mux application. 6. Self adjust temperature compensation circuitry This block provides 4 different compensation settings to satisfy various liquid crystal temperature gradings by software control. Default temperature coefficient (TC) setting is TC0. ) 1 ) ( ( ) 1 ( 6 R V V R V V V Contrast Gain V V SS DD ref DD L BE ref + − ∗ + = ∗ + ∗ = − β Int. Reg.Resistor Ratio Setting 0 1 2 3 4 5 6 7 Ext. Resistor Gain -3.29 -3.76 -4.29 -4.82 -5.39 -5.76 -6.40 -6.95 -(1+R2/R1) β 92.59 91.86 91.12 90.40 89.67 89.18 88.29 87.49 96.68 TC 0 (-0.01%/ °C) 2 (-0.10%/ °C) 4 (-0.18%/ °C) 7 (-0.25%/ °C) VBE 0.025 0.523 0.520 0.517 R 0.72 0.423 0.272 0.121 SSD1815 C3N C1P C1N C2P C2N VEE Remarks: 1. C1 = 0.47 - 1.0uF 2. Boosting input from VSS1. 3. VSS1 should be lower potential than or equal to VSS 4. All voltages are referenced to VDD VSS1 + C1 C1 + SSD1815 C3N C1P C1N C2P C2N VEE VSS1 + C1 C1 + C1 + SSD1815 C3N C1P C1N C2P C2N VEE VSS1 + C1 C1 + C1 + C1 + 2X Boosting Configuration 3X Boosting Configuration 4X Boosting Configuration Figure 6 - Configurations for DC-DC Converter |
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