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LPC2290 датащи(PDF) 21 Page - NXP Semiconductors |
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LPC2290 датащи(HTML) 21 Page - NXP Semiconductors |
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21 / 41 page ![]() Philips Semiconductors LPC2290 16/32-bit ARM microcontrollers with external memory interface Preliminary data Rev. 01 — 09 February 2004 21 of 41 9397 750 12874 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 6.14 I2C serial I/O controller I2C is a bi-directional bus for inter-IC control using only two wires: a serial clock line (SCL), and a serial data line (SDA). Each device is recognized by a unique address and can operate as either a receiver-only device (e.g. an LCD driver or a transmitter with the capability to both receive and send information (such as memory). Transmitters and/or receivers can operate in either master or slave mode, depending on whether the chip has to initiate a data transfer or is only addressed. I2C is a multi-master bus, it can be controlled by more than one bus master connected to it. I2C implemented in LPC2290 supports bit rate up to 400 kbit/s (Fast I2C). 6.14.1 Features • Standard I2C compliant bus interface. • Easy to configure as Master, Slave, or Master/Slave. • Programmable clocks allow versatile rate control. • Bidirectional data transfer between masters and slaves. • Multi-master bus (no central master). • Arbitration between simultaneously transmitting masters without corruption of serial data on the bus. • Serial clock synchronization allows devices with different bit rates to communicate via one serial bus. • Serial clock synchronization can be used as a handshake mechanism to suspend and resume serial transfer. • The I2C bus may be used for test and diagnostic purposes. 6.15 SPI serial I/O controller The LPC2290 contains two SPIs. The SPI is a full duplex serial interface, designed to be able to handle multiple masters and slaves connected to a given bus. Only a single master and a single slave can communicate on the interface during a given data transfer. During a data transfer the master always sends a byte of data to the slave, and the slave always sends a byte of data to the master. 6.15.1 Features • Compliant with Serial Peripheral Interface (SPI) specification. • Synchronous, Serial, Full Duplex, Communication. • Combined SPI master and slave. • Maximum data bit rate of one eighth of the input clock rate. |
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