P83C266BDR datasheet(51/92 Pages) PHILIPS

номер детали	P83C266BDR

подробное описание детали	80C51 8-bit CPU

PDF	92 Pages

Scroll/Zoom	100%

производитель	PHILIPS [NXP Semiconductors]

домашняя страница	http://www.nxp.com

Logo

51 / 92 page

1999 Mar 10

Philips Semiconductors

Product speciﬁcation

Microcontrollers for PAL/SECAM TV

with OSD and VST

P8xCx66 family

17.3.3

OSD VERTICAL START REGISTER (OSORGV)

Table 54 OSD Vertical Start Register (SFR address C2H)

Table 55 Description of OSORGV bits

76543210

−−

VP5

VP4

VP3

VP2

VP1

VP0

BIT

SYMBOL

DESCRIPTION

−

These 2 bits are not used.

−

VP5

Vertical starting position selection. These 6 bits select the vertical starting position of

the OSD. 1 of 63 starting positions may be selected. The reference point of the vertical

starting position is the leading edges of VSYNCP and HSYNCP. The vertical starting

position (VP) is calculated as follows:

Where (VP5

→ VP0) is the decimal value of the contents of OSORGV and

(VP5

→ VP0) ≥ 1.

VP4

VP3

VP2

VP1

VP0

Fig.31 Active R, G, B and FB polarity control.

handbook, full pagewidth

FB (R, G, B) pin

Bp = 0 (active LOW)

FB (R, G, B) pin

Bp = 1 (active HIGH)

character

display

intervals

character

display

intervals

MGL283

VP5

VP0

→

() horizontal scan lines

P83C266BDR датащи(PDF) 51 Page - NXP Semiconductors

P83C266BDR датащи(HTML) 51 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

датащи скачать

ссылки URL