HCPL-0708 datasheet(8/10 Pages) HP

8 / 10 page

Application Information

Bypassing and PC Board Layout

The HCPL-0708 optocoupler is

extremely easy to use. No

external interface circuitry is

required because the HCPL-0708

uses high-speed CMOS IC

technology allowing CMOS logic

to be connected directly to the

inputs and outputs.

As shown in Figure 6, the only

external component required for

proper operation is the bypass

capacitor. Capacitor values

should be between 0.01

µF and

0.1

µF. For each capacitor, the

total lead length between both

ends of the capacitor and the

power-supply pins should not

exceed 20 mm. Figure 7

illustrates the recommended

printed circuit board layout for

the HPCL-0708.

Figure 6. Recommended printed circuit board layout.

Figure 7. Recommended printed circuit board layout.

Propagation Delay, Pulse-Width

Distortion and Propagation Delay

Skew

Propagation Delay is a figure of

merit which describes how

quickly a logic signal propagates

through a system. The propaga-

tion delay from low to high (tPLH)

is the amount of time required for

an input signal to propagate to

the output, causing the output to

change from low to high.

Similarly, the propagation delay

from high to low (tPHL) is the

amount of time required for the

input signal to propagate to the

output, causing the output to

change from high to low. See

Figure 8.

INPUT

tPLH

tPHL

OUTPUT

10%

90%

10%

VOH

VOL

0 V

50%

5 V CMOS

2.5 V CMOS

GND

VDD

C1, C2 = 0.01 µF TO 0.1 µF

VDD

GND

C1, C2 = 0.01 µF TO 0.1 µF

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