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ams Datasheet

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[v1-02] 2016-Feb-08

TCS3472 − Principles of Operation

RGBC Operation

The RGBC engine contains RGBC gain control (AGAIN) and four

integrating analog-to-digital converters (ADC) for the RGBC

photodiodes. The RGBC integration time (ATIME) impacts both

the resolution and the sensitivity of the RGBC reading.

Integration of all four channels occurs simultaneously and upon

completion of the conversion cycle, the results are transferred

to the color data registers. This data is also referred to as channel

count.

The transfers are double-buffered to ensure that invalid data is

not read during the transfer. After the transfer, the device

automatically moves to the next state in accordance with the

configured state machine.

Figure 18:

RGBC Operation

Note(s):

1. In this document, the nomenclature uses the bit field name in italics followed by the register address and bit number to allow the

user to easily identify the register and bit that controls the function. For example, the power on (PON) is in register 0x00, bit 0. This

is represented as PON (r0x00:b0).