LAN9250 datasheet(153/421 Pages) MICROCHIP

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DS00001913A-page 153

LAN9250

Note:

When the RXCOE is enabled, automatic pad stripping must be disabled (Automatic Pad Stripping (PAD-

STR) bit of the Host MAC Control Register (HMAC_CR)) and vice versa. These functions cannot be enabled

simultaneously.

11.7.1

RX CHECKSUM CALCULATION

The checksum is calculated 16 bits at a time. In the case of an odd sized frame, an extra byte of zero is used to pad up

to 16 bits.

Consider the following packet: DA, SA, Type, B0, B1, B2 … BN, FCS

Let [A, B] = A*256 + B;

If the packet has an even number of octets then

checksum = [B1, B0] + C0 + [B3, B2] + C1 + … + [BN, BN-1] + CN-1

Where C0, C1, ... CN-1 are the carry out results of the intermediate sums.

If the packet has an odd number of octets then

checksum = [B1, B0] + C0 + [B3, B2] + C1 + … + [0, BN] + CN-1

11.8

Transmit Checksum Offload Engine (TXCOE)

The transmit checksum offload engine provides assistance to the CPU by calculating a 16-bit checksum, typically for

TCP, for a transmit Ethernet frame. The TXCOE calculates the checksum and inserts the results back into the data

stream as it is transferred to the MAC.

To activate the TXCOE and perform a checksum calculation, the Host must first set the TX Checksum Offload Engine

Enable (TX_COE_EN) bit in the Host MAC Checksum Offload Engine Control Register (HMAC_COE_CR). The Host

then pre-pends a 3 DWORD buffer to the data that will be transmitted. The prepended buffer includes a TX Command

A, TX Command B, and a 32-bit TX checksum preamble (refer to Table 11-8). When the CK bit of the TX Command ‘B’

is set in conjunction with the FS bit of TX Command ‘A’ and the TX Checksum Offload Engine Enable (TX_COE_EN)

bit of the Host MAC Checksum Offload Engine Control Register (HMAC_COE_CR) register, the TXCOE will perform a

checksum calculation on the associated packet. The TX checksum preamble instructs the TXCOE on the handling of

the associated packet. The TXCSSP - TX Checksum Start Pointer field of the TX checksum preamble defines the byte

offset at which the data checksum calculation will begin. The checksum calculation will begin at this offset and will con-

tinue until the end of the packet. The data checksum calculation must not begin in the MAC header (first 14 bytes) or in

the last 4 bytes of the TX packet. When the calculation is complete, the checksum will be inserted into the packet at the

byte offset defined by the TXCSLOC - TX Checksum Location field of the TX checksum preamble. The TX checksum

cannot be inserted in the MAC header (first 14 bytes) or in the last 4 bytes of the TX packet. If the CK bit is not set in

the first TX Command ‘B’ of a packet, the packet is passed directly through the TXCOE without modification, regardless

if the TXCOE_EN is set. An example of a TX packet with a prepended TX checksum preamble can be found in Section

11.11.6.3, "TX Example 3". In this example, the Host provides the Ethernet frame to the Ethernet controller in four frag-

ments, the first containing the TX Checksum Preamble. Figure 11-8 shows how these fragments are loaded into the TX

Data FIFO. For more information on the TX Command ‘A’ and TX Command ‘B’, refer to Section 11.11.2, "TX Command

Format," on page 161.

If the TX packet already includes a partial checksum calculation (perhaps inserted by an upper layer protocol), this

checksum can be included in the hardware checksum calculation by setting the TXCSSP field in the TX checksum pre-

amble to include the partial checksum. The partial checksum can be replaced by the completed checksum calculation

by setting the TXCSLOC pointer to point to the location of the partial checksum.

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