LAN88730 datasheet(8/82 Pages) MICROCHIP

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LAN88730

DS60001256B-page 8

 2012-2015 Microchip Technology Inc.

Receive

Data 1

RXD1

VO8

Bit 1 of the 4 (2 in RMII mode) data bits that are

sent by the transceiver on the receive path.

PHY Operat-

ing Mode 1

Configuration

Strap

MODE1

VIS

(PU)

Combined with MODE0 and MODE2, this configu-

ration strap sets the default PHY mode.

See Note 1 for more information on configuration

straps.

Note:

Refer to Section 3.7.2, "MODE[2:0]:

Mode Configuration" for additional

details.

Receive

Data 2

(MII Mode)

RXD2

VO8

Bit 2 of the 4 (in MII mode) data bits that are sent by

the transceiver on the receive path.

Note:

This signal is not used in RMII mode.

MII/RMII Mode

Select Configu-

ration Strap

RMIISEL

VIS

(PD)

This configuration strap selects the MII or RMII

mode of operation. When strapped low to VSS, MII

mode is selected. When strapped high to VDDIO

RMII mode is selected.

See Note 1 for more information on configuration

straps.

Note:

Refer to Section 3.7.3, "RMIISEL:

MII/RMII Mode Configuration" for addi-

tional details.

Receive

Data 3

(MII Mode)

RXD3

VO8

Bit 3 of the 4 (in MII mode) data bits that are sent by

the transceiver on the receive path.

Note:

This signal is not used in RMII mode.

PHY Address 2

Configuration

Strap

PHYAD2

VIS

(PD)

Combined with PHYAD0 and PHYAD1, this config-

uration strap sets the transceiver’s SMI address.

See Note 1 for more information on configuration

straps.

Note:

Refer to Section 3.7.1, "PHYAD[2:0]:

PHY Address Configuration" for addi-

tional information.

Receive Error

RXER

VO8

This signal is asserted to indicate that an error was

detected somewhere in the frame presently being

transferred from the transceiver.

Note:

This signal is optional in RMII mode.

Receive

Data 4

(MII Mode)

RXD4

VO8

In Symbol Interface (5B decoding) mode, this sig-

nal is the MII Receive Data 4 signal, the MSB of the

received 5-bit symbol code-group.

Note:

Unless configured to the Symbol Inter-

face mode, this pin functions as RXER.

PHY Address 0

Configuration

Strap

PHYAD0

VIS

(PD)

Combined with PHYAD1 and PHYAD2, this config-

uration strap sets the transceiver’s SMI address.

See Note 1 for more information on configuration

straps.

Note:

Refer to Section 3.7.1, "PHYAD[2:0]:

PHY Address Configuration" for addi-

tional information.

TABLE 2-1:

MII/RMII SIGNALS (CONTINUED)

Num Pins

Name

Symbol

Buffer Type

Description

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