| поискавой системы для электроныых деталей |
|
AS8FLC2M32 датащи(PDF) 3 Page - Micross Components |
|
|
|||||||||||||||||||||||||||||
AS8FLC2M32 датащи(HTML) 3 Page - Micross Components |
|
3 / 29 page ![]() FLASH AS8FLC2M32 AS8FLC2M32B Rev. 1.6 05/11 Micross Components reserves the right to change products or specifications without notice. 3 A system reset would then also reset the FLASH device, enabling the system microprocessor to read the boot-up firmware from the FLASH memory array. The device offers two power-saving features. When addresses have been stable for a specified amount of time, the device enters the AUTOMATIC SLEEP MODE. The system can also place the device into the STANDBY mode. Power consumption is greatly reduced in both these modes. Device Bus Operations This section describes the use of the command register for setting and controlling the bus operations. The command register itself does not occupy any addressable memory locations. The register is composed of a series of latches that store the commands, addresses and data information needed to execute the indicated command. The contents of the register serve as the input to the internal state machine. The state machine output dictates the function of the device. Table 1 lists the device bus operations, the inputs and control/stimulus levels they require, and the resulting output. The following subsections describe each of these operations in further detail. Requirements for Reading Array Data To read array data from the outputs, the system must drive the CSx\ and OE\ pins to VIL. Chip Select CSx\ is the power and chip select control of the byte or bytes targeted by the system (user). Output Enable [OE\] is the output control and gates array data to the output pins. Write (byte) Enables [WEx\] should remain at VIH levels. The internal state machine is set for reading array data upon device power-up, or after a HARDWARE RESET. This ensures that no spurious alteration of the memory content occurs during Table 1 the power transition. No command is necessary in this mode to obtain array data. Standard microprocessor read cycles that assert valid data on the device address inputs produce valid data on the data outputs. The device remains enabled for read access until the command register contents are altered. See READING ARRAY DATA for more information. Refer to AC Read Operations table data for timing specifications relevant to this operational mode. Writing Commands/Command Sequences To WRITE a command or command sequence, the system must drive CSx\, WEx\ to VIL and OE\ to VIH. An ERASE command operation can erase one sector, multiple sectors, or the entire array. Table 2 indicates the address space contained within each sector within the array. A sector address consists of the address bits required to uniquely select a sector. The “Command Definitions” section has details on erasure of a single, multiple sectors, the entire array or suspending/ resuming the erase operation. After the system writes the autoselect command sequence, the device enters the autoselect mode. The system can then read autoselect codes from the internal register (which is separate from the memory array) on each of the Data input/output bits within each byte of the MCM FLASH array. Standard read cycle timings apply in this mode. Refer to the Autoselect Mode and Autoselect Command Sequence sections for more information. ICC2 in the DC Characteristics table represents that active current specification for the WRITE mode. The AC Characteristics section contains timing specifications for Write Operations. RESET\ CS1\ CS2\ CS3\ CS4\ WE1\ WE2\ WE3\ WE4\ OE\ OPERATION ADDRESSES DATA BUS (DQ0-DQX) L HHH D0-D7 Out HL H H D8-D15 Out HH L H D16-D31 Out HHH L D24-D31 Out LLLL D0-D31 Out L HHH L H H H D0-D7 In H L H H H L H H D8-D15 In H H L H H H L H D16-D31 In H H H L H H H L D24-D31 In LLLL LLLL D0-D31 In VCC +/- 0.3V VCC +/- 0.3V VCC +/- 0.3V VCC +/- 0.3V VCC +/- 0.3V XXXX X Standby X X L L L L HHHH H Output Diable X L XXXX XXXX X Reset X VID L L L L LLLL H Sector Protect SECTOR ADDRESS A7=L, A2=H, A1=L DIN, DOUT VID LLLL LLLL H Sector Unprotect SECTOR ADDRESS A7=L, A2=H, A1=L DIN, DOUT VID XXXX XXXX X Temporary Sector Unprotect AIN DIN Legend L=Logic=VIL, H=Logic High=VIH, VID=12.0 +/-0.5V, X= Don't Care, AIN=Address In, DOUT=Data Out Notes H WRITE A0-Ax In H H L READ A0-Ax In H HHH |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |