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STM32F427AI датащи(PDF) 137 Page - STMicroelectronics |
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STM32F427AI датащи(HTML) 137 Page - STMicroelectronics |
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137 / 239 page ![]() DocID024030 Rev 9 137/238 STM32F427xx STM32F429xx Electrical characteristics 197 Output voltage levels Unless otherwise specified, the parameters given in Table 57 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 17. All I/Os are CMOS and TTL compliant. Table 57. Output voltage characteristics Symbol Parameter Conditions Min Max Unit VOL(1) 1. The IIO current sunk by the device must always respect the absolute maximum rating specified in Table 15. and the sum of IIO (I/O ports and control pins) must not exceed IVSS. Output low level voltage for an I/O pin CMOS port(2) IIO = +8 mA 2.7 V ≤VDD ≤3.6 V 2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52. -0.4 V VOH(3) 3. The IIO current sourced by the device must always respect the absolute maximum rating specified in Table 15 and the sum of IIO (I/O ports and control pins) must not exceed IVDD. Output high level voltage for an I/O pin VDD − 0.4 - VOL (1) Output low level voltage for an I/O pin TTL port(2) IIO =+ 8mA 2.7 V ≤VDD ≤3.6 V -0.4 V VOH (3) Output high level voltage for an I/O pin 2.4 - VOL(1) Output low level voltage for an I/O pin IIO = +20 mA 2.7 V ≤VDD ≤3.6 V -1.3(4) 4. Based on characterization data. V VOH(3) Output high level voltage for an I/O pin VDD−1.3(4) - VOL(1) Output low level voltage for an I/O pin IIO = +6 mA 1.8 V ≤VDD ≤3.6 V -0.4(4) V VOH(3) Output high level voltage for an I/O pin VDD−0.4(4) - VOL(1) Output low level voltage for an I/O pin IIO = +4 mA 1.7 V ≤VDD ≤3.6V -0.4(5) 5. Guaranteed by design. V VOH(3) Output high level voltage for an I/O pin VDD−0.4(5) - |
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