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STLUX385ATR датащи(PDF) 76 Page - STMicroelectronics |
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STLUX385ATR датащи(HTML) 76 Page - STMicroelectronics |
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76 / 126 page ![]() Option bytes STLUX 76/126 DocID027870 Rev 1 AFR_IOMXP1 (alternative Port1 configuration register) Bit 5 - 0: Refer to MSC_IOMXP1 miscellaneous register field description Section 8.2.3 on page 47. Bit 6: RFU reserved; must be kept 0 during register writing for future product compatibility. Bit 7: AUXTIM CCO aux timer compatibility features 0: CCO aux timer enabled 1: CCO aux timer disabled. nAFR_IOMXP1 (alternative Port1 configuration register protection) nAFR_IOMXP1: not (AFR_IOMXP1) EMC byte protection. Table 56. AFR_IOMXP1 (alternative Port1 configuration register) Offset: 0x004811 Default value: 0x00 or 0x3F or 0x1F or 0x0F according to the device 7 6 54 32 1 0 AUXTMR RFU Sel_P15(1) 1. Available only on the STLUX385A and STLUX383A, otherwise keep 0. Sel_P14(2) 2. Available only on the STLUX385A, STLUX383A and STLUX325A, otherwise keep 0. Sel_P13 Sel_P12 Sel_P11 Sel_P10 r/w r r/w r/w r/w r/w r/w r/w Table 57. nAFR_IOMXP1 (alternative Port1 configuration register protection) Offset: 0x004812 Default value: 0xFF or 0xC0 or 0xE0 or 0xF0 depends on devices 7 6 54 32 1 0 nAUXTMR nRFU nSel_P15 nSel_P14 nSel_P13 nSel_P12 nSel_P11 nSel_P10 r/w r r/w r/w r/w r/w r/w r/w |
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