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STM32L031C6 датащи(PDF) 85 Page - STMicroelectronics

номер детали STM32L031C6
подробное описание детали  Access line ultra-low-power 32-bit MCU ARM-based Cortex-M0, up to 32KB Flash, 8KB SRAM, 1KB EEPROM, ADC
PDF  118 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STM32L031C6 датащи(HTML) 85 Page - STMicroelectronics

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DocID027063 Rev 4
85/118
STM32L031x4/6
Electrical characteristics
95
Equation 1: RAIN max formula
The formula above (Equation 1) is used to determine the maximum external impedance
allowed for an error below 1/4 of LSB. Here N = 12 (from 12-bit resolution).
tCAL(3)
Calibration time
fADC = 16 MHz
5.2
µs
83
1/fADC
WLATENCY
ADC_DR register write
latency
ADC clock = HSI16
1.5 ADC
cycles + 2
fPCLK cycles
-
1.5 ADC
cycles + 3
fPCLK cycles
-
ADC clock = PCLK/2
-
4.5
-
fPCLK
cycle
ADC clock = PCLK/4
-
8.5
-
fPCLK
cycle
tlatr(3)
Trigger conversion latency
fADC = fPCLK/2 = 16 MHz
0.266
µs
fADC = fPCLK/2
8.5
1/fPCLK
fADC = fPCLK/4 = 8 MHz
0.516
µs
fADC = fPCLK/4
16.5
1/fPCLK
fADC = fHSI16 = 16 MHz
0.252
-
0.260
µs
JitterADC
ADC jitter on trigger
conversion
fADC = fHSI16
-1
-
1/fHSI16
tS(3)
Sampling time
fADC = 16 MHz
0.093
-
10.03
µs
1.5
-
239.5
1/fADC
tSTAB(3)
Power-up time
0
0
1
µs
tConV(3)
Total conversion time
(including sampling time)
fADC = 16 MHz
0.875
10.81
µs
14 to 173 (tS for sampling +12.5 for
successive approximation)
1/fADC
1. VDDA minimum value can be decreased in specific temperature conditions. Refer to Table 58: RAIN max for fADC = 16
MHz.
2. A current consumption proportional to the APB clock frequency has to be added (see Table 34: Peripheral current
consumption in Run or Sleep mode).
3. Guaranteed by design.
4. Standard channels have an extra protection resistance which depends on supply voltage. Refer to Table 58: RAIN max for
fADC = 16 MHz.
Table 57. ADC characteristics (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
R
AIN
T
S
f
ADC
C
ADC
2
N2
+

ln
-------------------------------------------------------------- R
ADC



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