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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LSM6DSL датащи(PDF) 53 Page - STMicroelectronics |
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LSM6DSL датащи(HTML) 53 Page - STMicroelectronics |
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53 / 113 page  DocID028475 Rev 5 53/113 LSM6DSL Register description 113 9.5 FIFO_CTRL2 (07h) FIFO control register (r/w). Table 29. FIFO_CTRL2 register description Table 28. FIFO_CTRL2 register TIMER_PEDO _FIFO_EN TIMER_PEDO _FIFO_DRDY 0(1) 1. This bit must be set to ‘0’ for the correct operation of the device. 0(1) FIFO_ TEMP_EN FTH10 FTH_9 FTH_8 TIMER_PEDO _FIFO_EN Enable pedometer step counter and timestamp as 4th FIFO data set. Default: 0 (0: disable step counter and timestamp data as 4th FIFO data set; 1: enable step counter and timestamp data as 4th FIFO data set) TIMER_PEDO _FIFO_DRDY FIFO write mode(1). Default: 0 (0: enable write in FIFO based on XL/Gyro data-ready; 1: enable write in FIFO at every step detected by step counter.) 1. This bit is effective if the DATA_VALID_SEL_FIFO bit of the MASTER_CONFIG (1Ah) register is set to 0. FIFO_TEMP_EN Enable the temperature data storage in FIFO. Default: 0. (0: temperature not included in FIFO; 1: temperature included in FIFO) FTH_[10:8] FIFO threshold level setting(2). Default value: 0000 Watermark flag rises when the number of bytes written to FIFO after the next write is greater than or equal to the threshold level. Minimum resolution for the FIFO is 1LSB = 2 bytes (1 word) in FIFO 2. For a complete watermark threshold configuration, consider FTH_[7:0] in FIFO_CTRL1 (06h). |
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