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ML620Q151A датащи(PDF) 13 Page - LAPIS Semiconductor Co., Ltd.

номер детали ML620Q151A
подробное описание детали  16-bit micro controller
PDF  36 Pages
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производитель  LAPIS [LAPIS Semiconductor Co., Ltd.]
домашняя страница  http://www.lapis-semi.com/
Logo LAPIS - LAPIS Semiconductor Co., Ltd.

ML620Q151A датащи(HTML) 13 Page - LAPIS Semiconductor Co., Ltd.

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FEDL620Q150A-01
ML620Q151A/2A/3A/4A/5A/6A/7A/8A/9A
13/36
Primary function
Secondary function
Tertiary function
Quaternary function
48
Pin
No.
52
Pin
No.
64
Pin
No.
Pin
name
I/O
Description
Pin
name
I/O
De-
scription
Pin
name
I/O
De-
scription
Pin
name
I/O
De-
scription
⎯
22
28
P53
I/O
Input/output port
TXD1
O
UART1
data
output
PWM6
O
PWM6
output
⎯
⎯
⎯
21
23
29
P54
I/O
Input/output port
RXD0
I
UART0
data
input
⎯
⎯
⎯
⎯
⎯
⎯
22
24
30
P55
I/O
Input/output port
TXD0
O
UART0
data
output
SIN0
I
SSIO0
data
input
TXD1
O
UART1
data
output
23
25
31
P56
I/O
Input/output port
⎯
⎯
⎯
SCK0
I/O
SSIO0
synchron
ous
clock
input/out
put
⎯
⎯
⎯
24
26
32
P57
I/O
Input/output port
⎯
⎯
⎯
SOUT0
O
SSIO0
data
output
PWM7
O
PWM7
output
25
27
33
P60
I/O
Input/output port
SDA
I/O
I
2C data
input/ou
tput
TMHAO
UT
O
TimerA
output
PWM6
O
PWM6
output
26
28
34
P61
I/O
Input/output port
SCL
I/O
I
2C
clock
input/ou
tput
TMHBO
UT
O
TimerB
output
PWM7
O
PWM7
output
27
29
35
P62/
PW45EV1
I/O
Input/output port /
PW45EV1 input
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
28
30
36
P63/
PW67EV1
I/O
Input/output port /
PW67EV1 input
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
31
37
P64
I/O
Input/output port
⎯
⎯
⎯
PWM4
O
PWM4
output
⎯
⎯
⎯
⎯
⎯
38
P65
I/O
Input/output port
LSCLK
O
Low-spe
ed clock
output
PWM5
O
PWM5
output
⎯
⎯
⎯
⎯
⎯
39
P66
I/O
Input/output port
OUTCLK
O
Low-spe
ed clock
output
PWM6
O
PWM6
output
⎯
⎯
⎯
⎯
⎯
40
P67
I/O
Input/output port
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
15
P70
I/O
Input/output port
⎯
⎯
⎯
PWM6
O
PWM6
output
⎯
⎯
⎯
⎯
⎯
16
P71
I/O
Input/output port
⎯
⎯
⎯
PWM7
O
PWM7
output
⎯
⎯
⎯
⎯
⎯
59
P72
I/O
Input/output port
RXD1
I
UART1
data
input
SIN0
I
SSIO0
data
input
⎯
⎯
⎯
⎯
⎯
60
P73
I/O
Input/output port
TXD1
O
UART1
data
output
SCK0
I/O
SSIO0
synchron
ous
clock
input/out
put
TXD0
O
UART0
data
output
⎯
⎯
61
P74
I/O
Input/output port
⎯
⎯
⎯
SOUT0
O
SSIO0
data
output
⎯
⎯
⎯
29
32
41
P80
I/O
Input/output port
SDA
I/O
I
2C data
input/ou
tput
SIN0
I
SSIO0
data
input
⎯
⎯
⎯
30
33
42
P81
I/O
Input/output port
SCL
I/O
I
2C
clock
input/ou
tput
SCK0
I/O
SSIO0
synchron
ous
clock
input/out
put
⎯
⎯
⎯
31
34
43
P82
I/O
Input/output port
⎯
⎯
⎯
SOUT0
O
SSIO0
data
output
⎯
⎯
⎯
32
35
44
P83
I/O
Input/output port
⎯
⎯
⎯
PWM5
O
PWM5
output
⎯
⎯
⎯
33
36
45
P84
I/O
Input/output port
RXD1
I
UART1
data
SIN0
I
SSIO0
data
⎯
⎯
⎯



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