TMS570LS datasheet(8/107 Pages) TI1

8 / 107 page

TMS570LS20206-EP, TMS570LS20216-EP

SPNS209A – JUNE 2012 – REVISED AUGUST 2012

www.ti.com

Device Overview

2.1

Terms and Acronyms

Table 2-1. Terms and Acronyms

Terms and Acronyms

Description

Comments

ADC

Analog To Digital Converter

AHB

Advanced High-performance Bus

Part of the R4 core

CCM-R4

CPU Compare Module for CortexTM-R4F

CRC

Cyclic Redundancy Check Controller

DAP

Debug Access Port

DAP is an implementation of an ARM Debug Interface.

DCAN

Controller Area Network

DMA

Direct Memory Access

DMM

Data Modification Module

ECC

Error Correction Code

EMIF

External Memory Interface

ESM

Error Signaling Module

ETM

Embedded Trace Module

FMzPLL

Frequency-Modulated Zero-Pin Phase-Locked

Loop

FPLL

FlexRay Phase-Locked Loop

GIO

General-Purpose Input/Output

HET

High-End Timer

ICEPICK

In Circuit Emulation TAP (Test Access Port)

ICEPick can connect or isolate a module level TAP to or from a

Selection Module

higher level chip TAP. ICEPick was designed with both

emulation and test requirements in mind.

JTAG

Joint Test Access Group

IEEE Committee responsible for Test Access Ports

LBIST

Logic Built-In Self Test

Test the integrity of R4 CPU

LIN

Local Interconnect Network

VIM

Vectored Interrupt Manager

MibSPI

Multi-Buffered Serial Peripheral Interface

MPU

Memory Protection Unit

OSC

Oscillator

PBIST

Programmable Built-In Self Test

Test the integrity of SRAM

PCR

Peripheral Central Resource

POM

Parameter Overlay Module

The POM provides a mechanism to redirect accesses to non-

volatile memory into a volatile memory external to the device.

PSA

Parallel Signature Analysis

RTI

Real-Time Interrupt

RTP

RAM Trace Port

SCR

Switch Central Resource

SCI

Serial Communication Interface

SECDED

Single Error Correction and Double Error

Detection

STC

Self Test Controller

SYS

System Module

Transfer Unit

VBUS

Virtual Bus

One of the protocols that comprises CBA (Common Bus

Architecture)

VBUSP

Virtual Bus-Pipelined

One of the protocols that comprises CBA (Common Bus

Architecture)

VMON

Voltage Monitor

Device Overview

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