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TMS570LS датащи(PDF) 52 Page - Texas Instruments

номер детали TMS570LS
подробное описание детали  Series 16/32-BIT RISC Flash Microcontroller
PDF  107 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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TMS570LS датащи(HTML) 52 Page - Texas Instruments

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ETM
DMM TAP
RTP TAP
TDI
TDO
DAP
TPIU
debug scan chain #0
debug scan chain #1
CPU
POM
DMM
RTP
boundary scan interface
0
1
CoreSight
Boundary
Scan
TMS570LS20206-EP, TMS570LS20216-EP
SPNS209A – JUNE 2012 – REVISED AUGUST 2012
www.ti.com
4.8
Debug Scan Chains
The device contains an ICEPICK module to access the debug scan chains. Debug scan chain #0 handles
the access to the CPU, to the ETM-R4 (External Trace Macrocell), to the POM (Parameter Overlay
Module) and to the TPIU (Test Port Interface Unit). Debug scan chain #1 handles the access to the Ram
Trace Port (RTP) and the Data Modification Module (DMM) which each incorporate a dedicated TAP (Test
Access Port) controller. Each module is selected via its scan chain number. The IcePick scan ID is
0x80206D05, which is the same number as the device ID.
Figure 4-1. Debug Scan Chains
4.8.1
JTAG
The 32bit JTAG ID code for this device is 0x0B7B302F.
52
Peripherals
Copyright © 2012, Texas Instruments Incorporated
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Product Folder Link(s): TMS570LS20206-EP TMS570LS20216-EP



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