LMX2471 datasheet(2/36 Pages) NSC

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Connection Diagram

24-Pin CSP (SLE) Package

20072122

Pin Descriptions

Pin #

Name

I/O

Pin Description

CPoutRF

RF charge pump output.

GND

Ground

GND

RF Ground

GND

Ground for RF PLL digital circuitry.

FinRF

RF prescaler input. Small signal input from the VCO.

FinRF*

RF prescaler complimentary input. For single-ended operation, a bypass capacitor should

be placed as close as possible to this pin and be connected directly to the ground plane.

VccRF

RF PLL power supply voltage input. Must be equal to VccIF . May range from 2.35V to

2.75V. Bypass capacitors should be placed as close as possible to this pin and be

connected directly to the ground plane.

Chip enable input. High impedance CMOS input. When EN is high, the chip is powered

up, otherwise it is powered down.

ENOSC

This pin should be grounded for normal operation.

CLK

MICROWIRE Clock. High impedance CMOS Clock input. Data for the various counters is

clocked into the 24 bit shift register on the rising edge.

DATA

MICROWIRE Data. High impedance binary serial data input.

MICROWIRE Load Enable. High impedance CMOS input. Data stored in the shift

registers is loaded into the internal latches when LE goes HIGH

Ftest/LD

Test frequency output / Lock Detect

VddIF

Digital power supply for IF PLL

VccIF

IF power supply voltage input. Must be equal to VccRF. Input may range from 2.35 V to

2.75 V. Bypass capacitors should be placed as close as possible to this pin and be

connected directly to the ground plane.

GND

Ground for RF PLL digital circuitry.

FinIF

IF prescaler input. Small signal input from the VCO.

GND

Digital ground for IF PLL

CPoutIF

IF PLL charge pump output

FLoutIF

IF Fastlock Output. Also functions as Programmable TRI-STATE CMOS output.

OSCout*

I/O

Complementary reference input or oscillator output.

OSCin

Reference input

VddRF

Digital power supply for RF PLL

FLoutRF

RF Fastlock Output. Also functions as Programmable TRI-STATE CMOS output.

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