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ST92196A датащи(PDF) 130 Page - STMicroelectronics |
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ST92196A датащи(HTML) 130 Page - STMicroelectronics |
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130 / 268 page ![]() 130/268 - ON SCREEN DISPLAY CONTROLLER (OSD) OSD CONTROLLER (Cont’d) 8.5.5.6 Event Line Address in Segment 22h: 00h (Bits 15:8), 01h (Bits 7:0) EL[8:0] is a 9-bit number specifying at which TV line number the character row display should start. For more details refer to Section 8.5.8.8 Bits 15:8: are at address 00h in Segment 22h. Bits 7:0 are at address 01h Bits 15:9 are reserved. 8.5.5.7 First Buffer Start Address Address in Segment 22h: 02h (Bits 15:8), 03h (Bits 7:0) To handle the display properly, the user must store the start address of the first OSDRAM row buffer (the row buffer containing the first row to be dis- played when the Display controller is turned on). Two bytes are reserved for this in the OSDRAM. (See Figure 59). Bits 15:8 are at address 02h in Segment 22h Bits 7:0 are at address 03h Bits 15:9 are reserved. As row buffer start addresses are always even ad- dresses, Bit 0 is forced to 0 by hardware. 15 8 7 0 - - - - - - - EL8 EL7 EL6 EL5 EL4 EL3 EL2 EL1 EL0 15 8 7 0 - - - - - - - FSA8 FSA7 FSA6 FSA5 FSA4 FSA3 FSA2 FSA1 0 |
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