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CAP1214 датащи(PDF) 41 Page - Microchip Technology |
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CAP1214 датащи(HTML) 41 Page - Microchip Technology |
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41 / 107 page ![]() Multiple Channel Capacitive Touch Sensor and LED Driver Datasheet SMSC CAP1214 41 Revision 1.0 (08-30-10) DATASHEET During Power-On-Reset (POR), the default values are stored in the registers. A POR is initiated when power is first applied to the part and the voltage on the VDD supply surpasses the POR level as specified in the electrical characteristics. Any reads to undefined registers will return 00h. Writes to undefined registers will not have an effect. When a bit is “set”, this means that the user writes a logic ‘1’ to it. When a bit is “cleared”, this means that the user writes a logic ‘0’ to it. 6.1 Main Status Control Register The Main Status and Control Register controls the primary power state of the device. Bit 6 - DEACT - Deactivates all sensor scanning and LED activity. ‘0’ - (default) - Sensor scanning is active and LEDs are functional. ‘1’ - All sensor scanning is disabled and all linked LEDs are disabled (see Section 6.51). The only way to restart scanning is to clear this bit. The status registers are automatically cleared and the INT bit is cleared. Bit 5 - SLEEP - Enables Sleep state by deactivating the LED activity and scanning those sensors enabled via the Sleep Control register. ‘0’ (default) - Sensor scanning is active and LEDs are functional. ‘1’ - All LEDs are disabled (except LED11) and the Capacitive Touch Sensor scanning is limited to the sensors set in the Sleep Channel Control register (see Section 6.22). The status registers will not be cleared. Bit 4 - DSLEEP - Enables the Deep Sleep state by deactivating all functions. ‘0’ (default) - Sensor scanning is active and LEDs are functional. ‘1’ - All sensor scanning is disabled. Except for LED11, all LEDs are driven to their programmed non-actuated state and no PWM operations will be done. The device will return to its previous power state when the ALERT pin is driven to its active level (see Section 5.8). The status registers are automatically cleared and the INT bit is cleared. SMBus communications targeted at the CAP1214 will bring the device out of deep sleep and automatically clear this bit. FEh R Manufacturer ID Stores a fixed value that identifies SMSC 5Dh Page 45 FFh R Revision Stores a fixed value that represents the revision number 80h Page 101 Table 6.2 Main Status Control Register ADDR R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 00h R/W Main Status Control - DEACT SLEEP DSLEEP - - PWR_ LED INT 00h Table 6.1 Register Set in Hexadecimal Order (continued) REGISTER ADDRESS R/W REGISTER NAME FUNCTION DEFAULT VALUE PAGE |
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