AS6200 datasheet(18/35 Pages) AMSCO

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[v1-01] 2016-Jun-17

AS6200 − Detailed Descriptions

Serial Interface

The device employs a standard I²C-Interface.

Bus Description

A data transfer must be invoked by a master device (e.g.

microcontroller) which defines the access to the slave device.

The master device defines and generates the serial clock (SCL)

and the start/stop conditions.

In order to address a specific device, a START condition has to

be generated by the master device by pulling the data line (SDA)

from a logic high level to a logic low level while the serial clock

signal (SCL) is kept at high level.

After the start condition, the slave address byte is transmitted

which is completed with a ninth bit which indicates a read

(bit=’1’) or a write operation (bit=’0’) respectively. All slaves

read the data on the rising edge of the clock. An acknowledge

signal is generated by the addressed slave during the ninth

clock pulse. This acknowledge signal is produced by pulling the

pin SDA to a low level by the selected slave.

Subsequently, the byte data transfer is started and finished by

an acknowledge bit. A change in the data signal (SDA) while the

clock signal (SCL) is high causes a START or STOP condition.

Hence, it must be ensured such a condition is prevented during

a data transfer phase.

After completing the data transfer, the master generates a STOP

condition by pulling the data line (SDA) from low level to high

level while the clock signal (SCL) is kept at high level.

Data Interface

A bus connection is created by connecting the open drain

input/output lines SDA and SCL to the two wire bus. The inputs

of SDA and SCL feature Schmitt-trigger inputs as well as low

pass filters in order to suppress noise on the bus line. This

improves the robustness against spikes on the two wire

interface.

Both fast transmission mode (1kHz to 400kHz) and high-speed

transmission mode (1kHz to 3.4MHz) are employed to cover

different bus speed settings.

Any data transfer transmits the MSB first and the LSB as last bit.

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