LPC2292 datasheet(25/40 Pages) PHILIPS

25 / 40 page

Philips Semiconductors

LPC2292/LPC2294

16/32-bit ARM microcontrollers with external memory interface

Preliminary data

Rev. 01 — 05 February 2004

25 of 40

9397 750 12748

6.21.2

PLL

The PLL accepts an input clock frequency in the range of 10 MHz to 25 MHz. The

input frequency is multiplied up into the range of 10 MHz to 60 MHz with a Current

Controlled Oscillator (CCO). The multiplier can be an integer value from 1 to 32 (in

practice, the multiplier value cannot be higher than 6 on this family of microcontrollers

due to the upper frequency limit of the CPU). The CCO operates in the range of

156 MHz to 320 MHz, so there is an additional divider in the loop to keep the CCO

within its frequency range while the PLL is providing the desired output frequency.

The output divider may be set to divide by 2, 4, 8, or 16 to produce the output clock.

Since the minimum output divider value is 2, it is insured that the PLL output has a

50% duty cycle.The PLL is turned off and bypassed following a chip Reset and may

be enabled by software. The program must conﬁgure and activate the PLL, wait for

the PLL to Lock, then connect to the PLL as a clock source.

6.21.3

Reset and wake-up timer

Reset has two sources on the LPC2292/LPC2294: the RESET pin and Watchdog

Reset. The RESET pin is a Schmitt trigger input pin with an additional glitch ﬁlter.

Assertion of chip Reset by any source starts the Wake-up Timer (see Wake-up Timer

description below), causing the internal chip reset to remain asserted until the

external Reset is de-asserted, the oscillator is running, a ﬁxed number of clocks have

passed, and the on-chip Flash controller has completed its initialization.

When the internal Reset is removed, the processor begins executing at address 0,

which is the Reset vector. At that point, all of the processor and peripheral registers

have been initialized to predetermined values.

The wake-up timer ensures that the oscillator and other analog functions required for

chip operation are fully functional before the processor is allowed to execute

instructions. This is important at power on, all types of Reset, and whenever any of

the aforementioned functions are turned off for any reason. Since the oscillator and

other functions are turned off during Power-down mode, any wake-up of the

processor from Power-down mode makes use of the Wake-up Timer.

The Wake-up Timer monitors the crystal oscillator as the means of checking whether

it is safe to begin code execution. When power is applied to the chip, or some event

caused the chip to exit Power-down mode, some time is required for the oscillator to

produce a signal of sufﬁcient amplitude to drive the clock logic. The amount of time

depends on many factors, including the rate of VDD ramp (in the case of power on),

the type of crystal and its electrical characteristics (if a quartz crystal is used), as well

as any other external circuitry (e.g. capacitors), and the characteristics of the

oscillator itself under the existing ambient conditions.

6.21.4

External interrupt inputs

The LPC2292/LPC2294 include up to nine edge or level sensitive External Interrupt

Inputs as selectable pin functions. When the pins are combined, external events can

be processed as four independent interrupt signals. The External Interrupt Inputs can

optionally be used to wake up the processor from Power-down mode.

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