ASX340AT

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9

TABLE 5. RESET/DEFAULT STATE OF INTERFACES (CONTINUED)

Name

Notes

Default State

Reset State

High impedance

High impedance

Input/Output. This interface disabled by default.

Input buffers (used for GPIO function) powered

down by default, so these pins can be left

unconnected (floating). After reset, these pins

are powered-up, sampled, then powered down

again as part of the auto-configuration

mechanism.

High impedance

High impedance

DAC_POS

High impedance

Driven

Output. Interface disabled by hardware reset

and enabled by default when the device starts

streaming.

DAC_NEG

DAC_REF

TDI

Internal pull-up enabled

Internal pull-up enabled

Input. Internal pull-up means that this pin can be

left unconnected (floating).

TDO

High impedance

High impedance

Output. Driven only during appropriate parts of

the JTAG shifter sequence.

TMS

Internal pull-up enabled

Internal pull-up enabled

Input. Internal pull-up means that this pin can be

left unconnected (floating).

TCK

Internal pull-up enabled

Internal pull-up enabled

Input. Internal pull-up means that this pin can be

left unconnected (floating).

TRST_N

N/A

N/A

Input. Must always be driven to a valid logic

level. Must be driven to GND for normal

operation.

FRAME_SYNC

N/A

N/A

Input. Must always be driven to a valid logic

level. Must be driven to GND if not used.

GPIO12

High impedance

High impedance

Input/Output. This interface disabled by default.

Input buffers (used for GPIO function) powered

down by default, so these pins can be left

unconnected (floating)

GPIO13

High impedance

High impedance

Input/Output. This interface disabled by default.

Input buffers (used for GPIO function) powered

down by default, so these pins can be left

unconnected (floating).

ATEST1

N/A

N/A

Must be driven to GND for normal operation.

ATEST2

N/A

N/A

Must be driven to GND for normal operation.

1. The reason for defining the default state as logic 0 rather than high impedance is this: when wired in a system (for example, on ON

Semiconductor’s demo boards), these outputs will be connected, and the inputs to which they are connected will want to see a valid logic

level. No current drain should result from driving these to a valid logic level (unless there is a pull-up at the system level).

2. These pads have their input circuitry powered down, but they are not output-enabled. Therefore, they can be left floating but they will not

drive a valid logic level to an attached device.