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DM6381F датащи(PDF) 25 Page - List of Unclassifed Manufacturers

номер детали DM6381F
подробное описание детали  V.34 Integrated Data/ Fax/Voice/Speakerphone Modem Device Set
PDF  40 Pages
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производитель  ETC [List of Unclassifed Manufacturers]
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DM6381F датащи(HTML) 25 Page - List of Unclassifed Manufacturers

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DM336P
V.34 Integrated Data/ Fax/Voice/Speakerphone Modem Device Set
Final
25
Version: DM336P-DS-F02
August 15, 2000
DM6381/82 Pin Description (continued)
Pin No.
Pin Name
I/O
Description
69
/RESET
I
Reset Pin Of DSP Chip, low active.
73
/IRQ0
I
Interrupt 0 Input
74
/IRQ1
I
Interrupt 1 Input
75
/IRQ2
I
Interrupt 2 Input
76
/IRQ3
I
Interrupt 3 Input
91 - 92
TEST, TEST1
I
These three pins define the testing mode operation of
DM6381/DM6382 as followed:
When Test=0
Test1
0, PLL output clock is 89.74MHz.
1, PLL output clock is 80.64MHz.
When Test=1:
Reserved for mass production testing mode.
All these 2 pins are pulled low internally.
96
FR_SP1
I/O
Frame Signal Of Serial Port 1
97
TD_SP1
O
Data Output Pin Of Serial Port 1
The serial data is clocked out through this pin according to the rising
edge of SCLK. The MSB is sent immediately after the falling edge of the
FR_SP1 signal.
98
RD_SP1
I
Data Input Pin Of The Serial Port 1
The serial data is sampled at the falling edge of the SCLK. The MSB is
coming immediately after the falling of FR_SP1 signal.
99
SCLK
I
Reference Clock For Serial Port 1 And Serial Port 2
100
TD_SP2
O
Data Output Pin Of Serial Port 2
The serial data is clocked out through this pin according to the rising
edge of SCLK. The MSB is sent immediately after the falling edge of the
FR_SP2 signal.



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