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ADS1216 датащи(PDF) 13 Page - Texas Instruments

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номер детали ADS1216
подробное описание детали  8-Channel, 24-Bit ANALOG-TO-DIGITAL CONVERTER
PDF  28 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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ADS1216 датащи(HTML) 13 Page - Texas Instruments

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ADS1216
SBAS171B
CALIBRATION
The offset and gain errors in the ADS1216, or the complete
system, can be reduced with calibration. Internal calibration of
the ADS1216 is called self calibration. This is handled with
three commands. One command does both offset and gain
calibration. There is also a gain calibration command and an
offset calibration command. Each calibration process takes
seven tDATA periods to complete. Therefore, it takes 14 tDATA
periods to complete both an offset and gain calibration.
For system calibration, the appropriate signal must be
applied to the inputs. The system offset command requires a
“zero” differential input signal. It then computes an offset that
will nullify offset in the system. The system gain command
requires a positive “full-scale” differential input signal. It then
computes a value to nullify gain errors in the system. Each of
these calibrations will take seven tDATA periods to complete.
Calibration should be performed after power on, a change in
temperature, or a change of the PGA. The RANGE bit (ACR
bit 2) must be zero during calibration. For operation with a
reference voltage greater than (AVDD – 1.5) Volts, the buffer
must also be turned off during calibration. Calibration will
remove the effects of the ODAC, therefore, changes to the
ODAC register must be done after calibration, otherwise the
calibration will remove the effects of the offset.
At the completion of calibration the DRDY signal goes low
which indicates the calibration is finished and valid data is
available.
DIGITAL FILTER
The Digital Filter can use either the fast settling, sinc2, or sinc3
filter, as shown in Figure 2. In addition, the Auto mode
changes the sinc filter after the input channel or PGA is
changed. When switching to a new channel, it will use the fast
FIGURE 3. Filter Frequency Responses.
FIGURE 2. Filter Step Responses.
SETTLING TIME
FILTER
(Conversion Cycles)
Sinc3
3(1)
Sinc2
2(1)
Fast
1(1)
NOTE: (1) With Synchronized Channel Changes.
CONVERSION CYCLE
12
3
4+
Discard
Fast
Sinc2
Sinc3
AUTO MODE FILTER SELECTION
FILTER SETTLING TIME
Adjustable Digital Filter
Data Out
Modulator
Output
Fast Settling
Sinc2
Sinc3
SINC3 FILTER RESPONSE
(–3dB = 0.262 • f
DATA = 15.76Hz)
Frequency (Hz)
0
–20
–40
–60
–80
–100
–120
0
30
120
60
90
150
180
210
240
270
300
SINC2 FILTER RESPONSE
(–3dB = 0.318 • f
DATA = 19.11Hz)
Frequency (Hz)
0
–20
–40
–60
–80
–100
–120
0
30
120
60
90
150
180
210
240
270
300
FAST SETTLING FILTER RESPONSE
(–3dB = 0.469 • f
DATA = 28.125Hz)
Frequency (Hz)
0
–20
–40
–60
–80
–100
–120
0
NOTE: f
DATA = 60Hz.
30
120
60
90
150
180
210
240
270
300
settling filter, for the next two conversions the first of which
should be discarded. It will then use the sinc2 followed by the
sinc3 filter to improve noise performance. This combines the
low-noise advantage of the sinc3 filter with the quick response
of the fast settling time filter. The frequency response of each
filter is shown in Figure 3.



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