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STA7360

T1

T2

The turn-on delay is given by:

T1+T2 STEREO

T2 BRIDGE

The best performance is obtained by driving the st-by

pin with a ramp having a slope slower than 2V/ms

TURN-OFF

A turn-off pop can occur if the st-by pin goes low with

a short time constant.This pop is due to the fast

switch-off of the internal current generator of the am-

plifier.If the voltage present across the load becomes

rapidly zero (due to the fast switch off) a small pop

occurs, depending also on Cout,Rload.

The parameters that set the switch off time constant

of the st-by pin are:

s

the st-by capacitor (C4)

s

the SVR capacitor (Csvr)

s

resistors connected from st-by pin to the logical

input (Rext)

BALANCED INPUT IN BRIDGE CONFIGURATION

A helpful characteristic of the STA7360 is that,in

bridge configuration, a signal present on both the in-

put capacitors is amplified by the same amount and

it is present in phase at the outputs,so this signal

does not produce effects on the load.The typical val-

ue of CMRR is 46dB.

Looking at fig 35, we can see that a noise signal from

the ground of the power amplifier to the ground of the

hypothetical preamplifier is amplified of a factor equal

to the gain of the amplifier (2 * Gv).

Using a configuration of fig. 36 the same ground

noise is present at the output multiplied by the factor

2 * Gv/200.

This means less distortion,less noise (e.g. motor cas-

sette noise) and/or a simplification of the layout of PC

board.

The only limitation of this balanced input is the maxi-

mum amplitude of common mode signals (few tens of

millivolt) to avoid a loss of output power due to the

common mode signal on the output, but in a large

number of cases this signal is within this range.

Figure 34.

(*) These parameters must be validated after final silicon character-

ization.