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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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GXM датащи(PDF) 218 Page - National Semiconductor (TI) |
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GXM датащи(HTML) 218 Page - National Semiconductor (TI) |
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218 / 244 page  www.national.com 218 Revision 3.1 Instruction Set (Continued) LEA Load Effective Address No Index Register 8D [mod reg r/m] --------- 1 1 With Index Register 11 LES Load Pointer to ES C4 [mod reg r/m] --------- 4 9 b h,i,j LFS Load Pointer to FS 0F B4 [mod reg r/m] --------- 4 9 b h,i,j LGDT Load GDT Register 0F 01 [mod 010 r/m] --------- 10 10 b,c h,l LGS Load Pointer to GS 0F B5 [mod reg r/m] --------- 4 9 b h,i,j LIDT Load IDT Register 0F 01 [mod 011 r/m] --------- 10 10 b,c h,l LLDT Load LDT Register From Register/Memory 0F 00 [mod 010 r/m] --------- 8 a g,h,j,l LMSW Load Machine Status Word From Register/Memory 0F 01 [mod 110 r/m] --------- 11 11 b,c h,l LODS Load String A [110 w] --------- 3 3 b h LSL Load Segment Limit From Register/Memory 0F 03 [mod reg r/m] -----x --- 9 a g,h,j,p LSS Load Pointer to SS 0F B2 [mod reg r/m] --------- 4 10 a h,i,j LTR Load Task Register From Register/Memory 0F 00 [mod 011 r/m] --------- 9 a g,h,j,l LEAVE Leave Current Stack Frame C9 --------- 4 4 b h LOOP Offset Loop/No Loop E2 + --------- 2 2 r LOOPNZ/LOOPNE Offset E0 + --------- 2 2 r LOOPZ/LOOPE Offset E1 + --------- 2 2 r MOV Move Data Register to Register 8 [10dw] [11 reg r/m] --------- 1 1 b h,i,j Register to Memory 8 [100w] [mod reg r/m] 1 1 Register/Memory to Register 8 [101w] [mod reg r/m] 1 1 Immediate to Register/Memory C [011w] [mod 000 r/m] ### 1 1 Immediate to Register (short form) B [w reg] ### 1 1 Memory to Accumulator (short form) A [000w] +++ 1 1 Accumulator to Memory (short form) A [001w] +++ 1 1 Register/Memory to Segment Register 8E [mod sreg3 r/m] 1 6 Segment Register to Register/Memory 8C [mod sreg3 r/m] 1 1 MOV Move to/from Control/Debug/Test Regs Register to CR0/CR2/CR3/CR4 0F 22 [11 eee reg] --------- 20/5/5 18/5/6 l CR0/CR2/CR3/CR4 to Register 0F 20 [11 eee reg] 6 6 Register to DR0-DR3 0F 23 [11 eee reg] 10 10 DR0-DR3 to Register 0F 21 [11 eee reg] 9 9 Register to DR6-DR7 0F 23 [11 eee reg] 10 10 DR6-DR7 to Register 0F 21 [11 eee reg] 9 9 Register to TR3-5 0F 26 [11 eee reg] 16 16 TR3-5 to Register 0F 24 [11 eee reg] 8 8 Register to TR6-TR7 0F 26 [11 eee reg] 11 11 TR6-TR7 to Register 0F 24 [11 eee reg] 3 3 MOVS Move String A [010w] --------- 6 6 b h MOVSX Move with Sign Extension Register from Register/Memory 0F B[111w] [mod reg r/m] --------- 1 1 b h MOVZX Move with Zero Extension Register from Register/Memory 0F B[011w] [mod reg r/m] --------- 1 1 b h MUL Unsigned Multiply Accumulator with Register/Memory Multiplier: Byte Word Doubleword F [011w] [mod 100 r/m] x - - - x x u u x 4 5 15 4 5 15 bh Table 9-27. Processor Core Instruction Set Summary (Continued) Instruction Opcode Flags Real Mode Prot’d Mode Real Mode Prot’d Mode OD I T S Z A P C FFFFFFFFF Clock Count (Reg/Cache Hit) Notes |
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