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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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GXM датащи(PDF) 214 Page - National Semiconductor (TI) |
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GXM датащи(HTML) 214 Page - National Semiconductor (TI) |
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214 / 244 page  www.national.com 214 Revision 3.1 Instruction Set (Continued) CALL Subroutine Call Direct Within Segment E8 +++ --------- 3 3 b h,j,k,r Register/Memory Indirect Within Segment FF [mod 010 r/m] 3/4 3/4 Direct Intersegment -Call GatetoSamePrivilege -Call Gate to Different Privilege No Par’s -Call Gate to Different Privilege m Par’s -16-bit Task to 16-bit TSS -16-bit Task to 32-bit TSS -16-bit Task to V86 Task -32-bit Task to 16-bit TSS -32-bit Task to 32-bit TSS -32-bit Task to V86 Task 9A [unsigned full offset, selector] 914 24 45 51+2m 183 189 123 186 192 126 Indirect Intersegment -Call GatetoSamePrivilege -Call Gate to Different Privilege No Par’s -Call Gate to Different Privilege m Par’s -16-bit Task to 16-bit TSS -16-bit Task to 32-bit TSS -16-bit Task to V86 Task -32-bit Task to 16-bit TSS -32-bit Task to 32-bit TSS -32-bit Task to V86 Task FF [mod 011 r/m] 11 15 25 46 52+2m 184 190 124 187 193 127 CBW Convert Byte to Word 98 --------- 3 3 CDQ Convert Doubleword to Quadword 99 --------- 2 2 CLC Clear Carry Flag F8 --------0 1 1 CLD Clear Direction Flag FC -0 ------- 4 4 CLI Clear Interrupt Flag FA --0 ------ 6 6 m CLTS Clear Task Switched Flag 0F 06 --------- 7 7 c l CMC Complement the Carry Flag F5 --------x 3 3 CMOVA/CMOVNBE Move if Above/Not Below or Equal Register, Register/Memory 0F 47 [mod reg r/m] --------- 1 1 r CMOVBE/CMOVNA Move if Below or Equal/Not Above Register, Register/Memory 0F 46 [mod reg r/m] --------- 1 1 r CMOVAE/CMOVNB/CMOVNC Move if Above or Equal/Not Below/Not Carry Register, Register/Memory 0F 43 [mod reg r/m] --------- 1 1 r CMOVB/CMOVC/CMOVNAE Move if Below/Carry/Not Above or Equal Register, Register/Memory 0F 42 [mod reg r/m] --------- 1 1 r CMOVE/CMOVZ Move if Equal/Zero Register, Register/Memory 0F 44 [mod reg r/m] --------- 1 1 r CMOVNE/CMOVNZ Move if Not Equal/Not Zero Register, Register/Memory 0F 45 [mod reg r/m] --------- 1 1 r CMOVG/CMOVNLE Move if Greater/Not Less or Equal Register, Register/Memory 0F 4F [mod reg r/m] --------- 1 1 r CMOVLE/CMOVNG Move if Less or Equal/Not Greater Register, Register/Memory 0F 4E [mod reg r/m] --------- 1 1 r CMOVL/CMOVNGE Move if Less/Not Greater or Equal Register, Register/Memory 0F 4C [mod reg r/m] --------- 1 1 r CMOVGE/CMOVNL Move if Greater or Equal/Not Less Register, Register/Memory 0F 4D [mod reg r/m] --------- 1 1 r CMOVO Move if Overflow Register, Register/Memory 0F 40 [mod reg r/m] --------- 1 1 r CMOVNO Move if No Overflow Register, Register/Memory 0F 41 [mod reg r/m] --------- 1 1 r CMOVP/CMOVPE Move if Parity/Parity Even Register, Register/Memory 0F 4A [mod reg r/m] --------- 1 1 r CMOVNP/CMOVPO Move if Not Parity/Parity Odd Register, Register/Memory 0F 4B [mod reg r/m] --------- 1 1 r Table 9-27. Processor Core Instruction Set Summary (Continued) Instruction Opcode Flags Real Mode Prot’d Mode Real Mode Prot’d Mode OD I T S Z A P C FFFFFFFFF Clock Count (Reg/Cache Hit) Notes |
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