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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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GXM датащи(PDF) 219 Page - National Semiconductor (TI) |
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GXM датащи(HTML) 219 Page - National Semiconductor (TI) |
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219 / 244 page  Revision 3.1 219 www.national.com Instruction Set (Continued) NEG Negate Integer F [011w] [mod 011 r/m] x- - - xxxxx 1 1 b h NOP No Operation 90 --------- 1 1 NOT Boolean Complement F [011w] [mod 010 r/m] --------- 1 1 b h OIO Official Invalid Opcode 0F FF --x 0 ----- 1 8-125 OR Boolean OR Register to Register 0 [10dw] [11 reg r/m] 0 - - - x x u x 0 1 1 b h Register to Memory 0 [100w] [mod reg r/m] 1 1 Memory to Register 0 [101w] [mod reg r/m] 1 1 Immediate to Register/Memory 8 [00sw] [mod 001 r/m] ### 1 1 Immediate to Accumulator 0 [110w] ### 1 1 OUT Output to Port Fixed Port E [011w] # --------- 14 14/28 m Variable Port E [111w] 14 14/28 OUTS Output String 6 [111w] --------- 15 15/29 b h,m POP Pop Value off Stack Register/Memory 8F [mod 000 r/m] --------- 1/4 1/4 b h,i,j Register (short form) 5 [1 reg] 1 1 Segment Register (ES, SS, DS) [000 sreg2 111] 1 6 Segment Register (FS, GS) 0F [10 sreg3 001] 1 6 POPA Pop All General Registers 61 --------- 9 9 b h POPF Pop Stack into FLAGS 9D xxxxxxxxx 8 8 b h,n PREFIX BYTES Assert Hardware LOCK Prefix F0 --------- m Address Size Prefix 67 Operand Size Prefix 66 Segment Override Prefix -CS -DS -ES -FS -GS -SS 2E 3E 26 64 65 36 PUSH Push Value onto Stack Register/Memory FF [mod 110 r/m] --------- 1/3 1/3 b h Register (short form) 5 [0 reg] 1 1 Segment Register (ES, CS, SS, DS) [000 sreg2 110] 1 1 Segment Register (FS, GS) 0F [10 sreg3 000] 1 1 Immediate 6 [10s0] ### 1 1 PUSHA Push All General Registers 60 --------- 11 11 b h PUSHF Push FLAGS Register 9C --------- 2 2 b h RCL Rotate Through Carry Left Register/Memory by 1 D [000w] [mod 010 r/m] x -------x 3 3 b h Register/Memory by CL D [001w] [mod 010 r/m] u -------x 8 8 Register/Memory by Immediate C [000w] [mod 010 r/m] # u -------x 8 8 RCR Rotate Through Carry Right Register/Memory by 1 D [000w] [mod 011 r/m] x -------x 4 4 b h Register/Memory by CL D [001w] [mod 011 r/m] u -------x 8 8 Register/Memory by Immediate C [000w] [mod 011 r/m] # u -------x 8 8 RDMSR Read Tmodel Specific Register 0F 32 --------- RDTSC Read Time Stamp Counter 0F 31 --------- REP INS Input String F3 6[110w] --------- 17+4n 17+4n\ 32+4n bh,m REP LODS Load String F3 A[110w] --------- 9+2n 9+2n b h REP MOVS Move String F3 A[010w] --------- 12+2n 12+2n b h Table 9-27. Processor Core Instruction Set Summary (Continued) Instruction Opcode Flags Real Mode Prot’d Mode Real Mode Prot’d Mode OD I T S Z A P C FFFFFFFFF Clock Count (Reg/Cache Hit) Notes |
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