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PIC16F5X датащи(PDF) 16 Page - Microchip Technology

номер детали PIC16F5X
подробное описание детали  Flash-Based, 8-Bit CMOS Microcontroller Series
PDF  90 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F5X датащи(HTML) 16 Page - Microchip Technology

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PIC16F5X
DS41213C-page 14
 2004 Microchip Technology Inc.
3.2
Data Memory Organization
Data memory is composed of registers or bytes of
RAM. Therefore, data memory for a device is specified
by its register file. The register file is divided into two
functional groups: Special Function Registers (SFR)
and General Purpose Registers (GPR).
The Special Function Registers include the TMR0
register, the Program Counter (PC), the Status register,
the I/O registers (ports) and the File Select Register
(FSR). In addition, Special Purpose Registers are used
to control the I/O port configuration and prescaler
options.
The General Purpose Registers are used for data and
control information under command of the instructions.
For the PIC16F54, the register file is composed of 7
Special Function Registers and 25 General Purpose
Registers (Figure 3-3).
For the PIC16F57, the register file is composed of 8
Special Function Registers, 8 General Purpose
Registers
and
64
additional
General
Purpose
Registers that may be addressed using a banking
scheme (Figure 3-4).
For the PIC16F59, the register file is composed of 10
Special Function Registers, 6 General Purpose
Registers
and
128
additional
General
Purpose
Registers that may be addressed using a banking
scheme (Figure 3-5).
3.2.1
GENERAL PURPOSE REGISTER
FILE
The register file is accessed either directly or indirectly
through the File Select Register (FSR). The FSR
register is described in Section 3.7 “Indirect Data
Addressing; INDF and FSR Registers”.
FIGURE 3-3:
PIC16F54 REGISTER FILE
MAP
FIGURE 3-4:
PIC16F57 REGISTER FILE MAP
File Address
00h
01h
02h
03h
04h
05h
06h
1Fh
INDF(1)
TMR0
PCL
STATUS
FSR
PORTA
PORTB
General
Purpose
Registers
Note 1:
Not a physical register. See Section 3.7
“Indirect Data Addressing; INDF and FSR
Registers”
.
07h
File Address
00h
01h
02h
03h
04h
05h
06h
07h
1Fh
INDF(1)
TMR0
PCL
STATUS
FSR
PORTA
PORTB
0Fh
10h
Bank 0
Bank 1
Bank 2
Bank 3
3Fh
30h
20h
2Fh
5Fh
50h
40h
4Fh
7Fh
70h
60h
6Fh
General
Purpose
Registers
General
Purpose
Registers
General
Purpose
Registers
General
Purpose
Registers
General
Purpose
Registers
PORTC
08h
Addresses map back to
addresses in Bank 0.
Note 1:
Not a physical register. See Section 3.7 “Indirect Data Addressing; INDF and FSR Registers”.
FSR<6:5>
00
01
10
11



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