PC87591L datasheet(186/437 Pages) NSC

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For positive input voltages higher than VFS, a resistor divider should be used in front of the analog input (see Figure 61a).

The divider should be calculated so that its output is lower than the full-scale value (VFS) for the maximum input signal

voltage.

For negative input voltages, a resistive level-shifter should be used in front of the analog input (see Figure 61b). The level-

shifter should be calculated so that its output is higher than 0V for the minimum input signal voltage.

Filtering the Noise on Voltage Input Signals

Noise may be coupled to the input signal for various reasons, including close proximity to digital circuits. The slow change

rate of the input signals, makes it possible to use an external low pass filter (LPF). This can be implemented by placing a

capacitor (CF) between the divider output and AGND, as shown in Figure 61. The cutoff frequency of this LPF should be at

least 22 times the maximum signal frequency required to be measured with a 10-bit accuracy (a smaller capacitor may be

used when a lower accuracy is acceptable). The formula below demonstrates the calculation of the components.

f(-3dB) =1/(2 * π * Req * CF)

where:

Req = (R1* R2) / (R1 + R2)

Calculating the Voltage Channel Delay

The Voltage measurement delay time (tVD) is the period between input selection and the A/D conversion start. This delay

should be long enough to guarantee the voltage settling at the input of the A/D converter to within 1/2 LSB. This includes

the input interface circuits of the ADC and the externally added noise-rejection filters (if applicable). Figure 62 shows the

equivalent R-C circuit of a filtered input. Req represents the equivalent resistance of the input divider or level-shifter (see the

preceding section, “Filtering the Noise on Voltage Input Signals”). CF is the filter capacitor. The Input Interface Circuit in-

cludes the input the multiplexer.

Since the R-C of the input circuit is short, typically, all that is required is a very short delay, which shortens the overall mea-

surement time. The delay length may be sized during development by increasing the delay time from the minimum value to

the point were the ADC readout is not affected by the delay value (i.e., use the minimal delay to which the ADC readout is

invariant).

Thermistor-Based Temperature Measurement

The ADC is capable of measuring temperature by means of NTC or PTC thermistor devices. These elements change their

resistance according to their temperature. The resistance change is converted to voltage by connecting the element in a

voltage divider between AVCC and AGND, as shown in Figure 63. The translation of voltage to temperature is determined

by the parameters of the NTC/PTC thermistor in use.

VIN (12V)

ADn

VIN (-12V)

AVCC

AGND

Figure 61. Measurement of Positive and Negative Voltages

a. VIN > VFS

b. VIN < 0

Input

Signal

Figure 62. Filtered Voltage Input Equivalent Circuit

Interface

ADn

Circuit

Req

VIN

Input

A/D Converter

Σ−∆

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