PC87591L datasheet(188/437 Pages) NSC

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Revision 1.07

Calculating the Temperature Channel Delay

The delay time is the period between diode selection and the A/D conversion start. Due to the switched diode current, this

delay should be long enough to guarantee the voltage settling at the input of the A/D converter to within 0.5oC. This includes

the input interface circuits of the ADC and the externally added capacitors (CC).

It is preferable to use the minimal delay possible for the system. This depends on the capacitance on the wires and serial

resistance. TMPDLY field of ADLYCTL register defines the delay. Typically, a delay of 128 or 256 clocks (values 3 and 4,

respectively) is adequate. To find the best value, start from a high delay and reduce it until the point that the temperature

readouts starts to change. This parameter is mostly board layout and component dependent.

PC Board Layout

●

Place the PC87591x as close as practical to the remote diode.

In a noisy environment, such as a computer moth-

erboard, this distance can be 4 in. to 8 in. (typical) or more, as long as the worst noise sources (such as CRTs, clock

generators, memory buses and ISA/PCI buses) are avoided.

●

Do not route the DP and DN lines next to high inductance signals. Also, do not route the traces across a fast memory

bus, which can easily introduce +30˚C error, even with good ﬁltering. Otherwise, most noise sources are fairly benign.

●

Route the DP and DN traces in parallel and in close proximity to each other, away from any high voltage traces such

as +12V DC. Beware of leakage currents from PC board contamination; e.g., a 20 M

Ω leakage path from DP to

ground causes about +1˚C error.

●

Connect guard traces to AGND on either side of the DP and DN traces (Figure 65). An additional AGND plane should

be placed “beneath” these traces. With guard traces and AGND plane in place, routing near high-voltage traces is no

longer a problem.

●

Route through as few vias and crossunders as possible to minimize copper/solder thermocouple effects.

●

When introducing a thermocouple, make sure that both the DP and DN paths have matching thermocouples.

In general, PC board-induced thermocouples are not a serious problem. A copper-solder thermocouple exhibits

µV/˚C, and it takes about 200 µV of voltage error at DP and DN to cause a 1˚C measurement error. Therefore, most

parasitic thermocouple errors can be ignored.

●

Use wide traces. Narrow ones are more inductive and tend to pick up radiated noise. The 10 mil widths and spacings

recommended in Figure 65 are not absolutely necessary (as they offer only a minor improvement in leakage and

noise), but try to use them where practical.

2N3904

Twisted Wire Pair or

PC87591x

CD = 2.2 to 3.3 nF

shielded PCB lines

Figure 64. Typical Remote Diode Circuit

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