PC87591L datasheet(101/437 Pages) NSC

101 / 437 page

Embedded Controller Modules (Continued)

Revision 1.07

101

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4.3.4

ICU Registers

For a summary of the abbreviations used for Register Type, see “Register Abbreviations and Access” on page 34.

ICU Register Map

Interrupt Vector Register (IVCT)

The IVCT register holds the vector number of the interrupt vector. IVCT is set to 1016 on reset.

Location: 00 FE0016

Type: RO

NMI Status Register (NMISTAT)

The NMISTAT register holds the status of the current pending Non-Maskable Interrupt (NMI) requests. This register is cleared

on reset and each time its contents are read. Refer to the description of the PFAIL register below for additional details.

Location: 00 FE0216

Type: RO

Mnemonic

Type

IVCT

Interrupt Vector

NMISTAT

NMI Status

PFAIL

Power Fail Interrupt Control and Status

R/W

ISTAT0

Interrupt Status 0

ISTAT1

Interrupt Status 1

IENAM0

Interrupt Enable and Mask 0

R/W

IENAM1

Interrupt Enable and Mask 1

R/W

IECLR0

Edge Interrupt Clear 0

IECLR1

Edge Interrupt Clear 1

Bit

76543210

Name

INTVECT

Reset

00010000

Bit

Description

5-0

INTVECT (Interrupt Vector). Contains the encoded value of the enabled pending interrupt with the highest

priority; the valid values range from 1016 to 2F16. Valid during an interrupt acknowledge core bus cycle in which

IVCT is read. It may contain invalid data when INTVECT is updated.

7-6

These bits return 0 when read.

Bit

76543210

Name

Reserved

EXT

Reset

00000000

Bit

Description

EXT (External Non-Maskable Interrupt Request).

0: No external non-maskable interrupt request occurred

1: External non-maskable interrupt request occurred

7-1

Reserved.

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