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PC87591L датащи(PDF) 233 Page - National Semiconductor (TI) |
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PC87591L датащи(HTML) 233 Page - National Semiconductor (TI) |
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233 / 437 page ![]() Embedded Controller Modules (Continued) Revision 1.07 233 www.national.com Flash Memory Page Erase Time Register (FLPERASE) The FLPERASE register controls the page erase pulse width. FLPERASE defaults to (0916) on reset. Location: 00 F8D216 Type: R/W Flash Memory Section Erase Time Register (FLSERASE) The FLSERASE register controls the section erase pulse width. FLSERASE defaults to (0916) on reset. Location: 00 F8D416 Type: R/W Flash Memory End Time Register (FLEND) The FLEND register controls the program/page erase end delay time. FLEND defaults to (1416) on reset. Location: 00 F8D816 Type: R/W Bit 76543210 Name FTPER Reset 00001001 Bit Description 7-0 FTPER (Page Erase Pulse Width). This register should be configured based on the currently set core frequency. See Table 33 on page 223 for details of required values. Bit 76543210 Name FTSER Reset 00001001 Bit Description 7-0 FTSER (Section Erase Pulse Width). This register should be configured based on the currently set core frequency. See Table 33 on page 223 for details of required values. Bit 76543210 Name FTEND Reset 00010100 Bit Description 7-0 FTEND (End Delay Count). This register should be configured based on the currently set core frequency. See Table 33 on page 223 for details of required values. |
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