PCF8833USLASH2DA datasheet(92/112 Pages) PHILIPS

92 / 112 page

2003 Feb 14

Philips Semiconductors

Objective speciﬁcation

STN RGB - 132

× 132 × 3 driver

PCF8833

15.9

Programming speciﬁcation

For programming OTP cells, the VOTP(gate) and VOTP(drain) voltages have to be applied as indicated in Fig.57. Voltages

VOTP(gate) and VOTP(drain) can be applied at the same time or can have a staggered sequence as indicated by cases

a and b of Fig.57.

Depending on the series resistance in the supply wires, up to 16 OTP bits can be programmed at the same time. Each

OTP cell can only be programmed once.

Table 98 Programming speciﬁcation (see Fig.57)

Note

1. The voltage drop across the ITO track and any connector must be taken into account to guarantee a sufficiently high

voltage at the chip pins.

SYMBOL

PARAMETER

CONDITION

MIN.

TYP.

MAX.

UNIT

VOTP(gate)

voltage applied to VOTP(gate) pin

relative to VSS1

programming active;

note 1

tbf

programming inactive

tbf

VOTP(drain)

voltage applied to VOTP(drain) pin

relative to VSS1

programming active;

note 1

tbf

programming inactive

tbf

IOTP(gate)

current drawn by VOTP(gate) during

programming

tbf

100

tbf

µA

IOTP(drain)

current drawn by VOTP(drain) during

programming

per programmed OTP

cell

tbf

500

tbf

µA

Tamb(prog)

ambient temperature during

programming

025

°C

tOPESU

set-up time of OPE as a function of

VOTP(gate) and VOTP(drain)

VOTP(gate) and

VOTP(drain) > 0 V

−−

tOPEHD

hold time of OPE as a function of

VOTP(gate) and VOTP(drain)

VOTP(gate) and

VOTP(drain) > 0 V

−−

tWRITEPW

pulse width of programming voltage

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