NRND

TP3404

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SNOS703 – DECEMBER 2004

LINE RECEIVE SECTIONS

The input of each receive section, Li0–Li3, consists of a continuous anti-alias filter followed by a switched-

capacitor low-pass filter designed to limit the noise bandwidth with minimum intersymbol interference. To correct

pulse attenuation and distortion caused by the transmission line an AGC circuit and first-order equalizer adapt to

the received pulse shape, thus restoring a “flat” channel response with maximum received eye opening over a

wide spread of cable attenuation characteristics.

From the equalized output a DPLL (Digital Phase-Locked Loop) recovers a low-jitter clock for optimum sampling

of the received symbols. The MCLK input provides the reference clock for the DPLL at 4.096 MHz.

polynomial and presented to the digital system interface circuit.

When a transmission line is de-activated, a Line-Signal Detect Circuit is enabled to detect the presence of

incoming bursts if the far-end starts to activate the loop.

Figure 3. Typical AMI Waveform at Lo

Figure 4. Typical AMI Transmit Spectrum Measured at LO Output (With RGB = 100 Hz)

Copyright © 2004, Texas Instruments Incorporated

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