EMC2103 datasheet(70/85 Pages) MICROCHIP

70 / 85 page

RPM-Based Fan Controller with Hardware Thermal Shutdown

Datasheet

DS0005250A-page 70

 2013 Microchip Technology Inc.



‘0’ (default) - The ALERT pin will not be asserted when the GPIO1 pin changes state (when

configured as an input).



‘1’ - The ALERT pin will be asserted when the GPIO1 pin changes state (when configured as an

input)

6.39

GPIO Status Register (EMC2103-2 and EMC2103-4 Only)

The GPIO Status Register indicates which GPIO has changed states to cause the ALERT pin to be

asserted. This register is cleared when it is read. The bits in this register are set whenever the

corresponding GPIO changes states regardless if the ALERT pins are asserted. Once a bit is set, it

will remain set until read.

If any bit in this register is set, then the GPIO status bit will be set.

Bit 1 - GPIO2_STS - Indicates that the GPIO2 pin has changed states from a ‘0’ to a ‘1’ or a ‘1’ to a

‘0’ (when configured as a GPIO input).

Bit 0 - GPIO1_STS - Indicates that the GPIO1 pin has changed states from a ‘0’ to a ‘1’ or a ‘1’ to a

‘0’ (when configured as a GPIO input).

6.40

Software Lock Register

The Software Lock Register controls the software locking of critical registers. This register is software

locked.

Bit 0 - LOCK - this bit acts on all registers that are designated SWL. When this bit is set, the locked

registers become read only and cannot be updated.



‘0’ (default) - all SWL registers can be updated normally.



‘1’ - all SWL registers cannot be updated and a hard-reset is required to unlock them.

6.41

Product Features Register

Table 6.56 GPIO Status Register

ADDR

R/W

DEFAULT

E6h

R-C

GPIO

Status

GPIO2_

STS

GPIO1_

STS

00h

Table 6.57 Software Lock

ADDR

R/W

DEFAULT

EFh

R/W

Software

Lock

LOCK

00h

Table 6.58 Product Features Register

ADDR

R/W

DEFAULT

FCh

Product

Features

SHDN_SEL[2:0]

00h

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