MCP1804_13 datasheet(16/36 Pages) MICROCHIP

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MCP1804

DS20002200D-page 16

 2009-2013 Microchip Technology Inc.

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

3.1

Unregulated Input Voltage (VIN)

Connect VIN to the input unregulated source voltage.

Like all low dropout linear regulators, low source

impedance is necessary for the stable operation of the

LDO. The amount of capacitance required to ensure

low source impedance will depend on the proximity of

the input source capacitors or battery type. For most

applications, 0.1 µF to 1.0 µF of capacitance will

ensure stable operation of the LDO circuit. The type of

capacitor used can be ceramic, tantalum or aluminum

electrolytic. The low ESR characteristics of the ceramic

will yield better noise and PSRR performance at high

frequency.

3.2

Ground Terminal (GND)

Regulator ground. Tie GND to the negative side of the

output and the negative side of the input capacitor.

Only the LDO bias current (50 to 60 µA typical) flows

out of this pin; there is no high current. The LDO output

regulation is referenced to this pin. Minimize voltage

drops between this pin and the negative side of the

load.

3.3

Shutdown Input (SHDN)

The SHDN input is used to turn the LDO output voltage

on and off. When the SHDN input is at a logic-high

level, the LDO output voltage is enabled. When the

SHDN input is pulled to a logic-low level, the LDO

output voltage is disabled and the LDO enters a low

quiescent current shutdown state where the typical

quiescent current is 0.01 µA. The SHDN pin does not

have an internal pull-up or pull-down resistor. The

SHDN pin must be connected to either VIN or GND to

prevent the device from becoming unstable.

3.4

Regulated Output Voltage (VOUT)

Connect VOUT to the positive side of the load and the

positive terminal of the output capacitor. The positive

side of the output capacitor should be physically

located as close to the LDO VOUT pin as is practical.

The current flowing out of this pin is equal to the DC

load current. For most applications, 0.1 µF to 1.0 µF of

capacitance will ensure stable operation of the LDO

circuit. Larger values may be used to improve dynamic

load response. The type of capacitor used can be

ceramic, tantalum or aluminum electrolytic. The low

ESR characteristics of the ceramic will yield better

noise and PSRR performance at high frequency.

3.5

No Connect (NC)

No internal connection. The pins marked NC are true

“No Connect” pins.

TABLE 3-1:

MCP1804 PIN FUNCTION TABLE

MCP1804

Symbol

Description

SOT-23-5

SOT-89-5

SOT-89-3

SOT-223-3

VIN

Unregulated Supply Voltage

2, TAB

GND

Ground Terminal

—

No connection

——

SHDN

Shutdown

VOUT

Regulated Voltage Output

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