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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LM93 датащи(PDF) 20 Page - National Semiconductor (TI) |
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LM93 датащи(HTML) 20 Page - National Semiconductor (TI) |
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20 / 92 page  14.0 SMBus Interface (Continued) 14.5.2 Block Command Code Summary Block command codes control the block read and write operations of the LM93 as summarized in the following table: Command Code Name Value Description Block Write Command F0h SMBus Block Write Command Code Block Read Command F1h SMBus Block Write/Read Process Call Fixed Block 0 F2h Fixed Block Read Command Code: address 40h, size 8 bytes Fixed Block 1 F3h Fixed Block Read Command Code: address 48h, size 8 bytes Fixed Block 2 F4h Fixed Block Read Command Code: address 50h, size 6 bytes Fixed Block 3 F5h Fixed Block Read Command Code: address 56h, size 16 bytes Fixed Block 4 F6h Fixed Block Read Command Code: address 67h, size 4 bytes Fixed Block 5 F7h Fixed Block Read Command Code: address 6Eh, size 8 bytes Fixed Block 6 F8h Fixed Block Read Command Code: address 78h, size 12 bytes Fixed Block 7 F9h Fixed Block Read Command Code: address 90h, size 32 bytes Fixed Block 8 FAh Fixed Block Read Command Code: address B4h, size 8 bytes Fixed Block 9 FBh Fixed Block Read Command Code: address C8h, size 8 bytes Fixed Block 10 FCh Fixed Block Read Command Code: address D00h, size 16 bytes Fixed Block 11 FDh Fixed Block Read Command Code: address E5h, size 9 bytes 14.5.3 Write Operations The LM93 supports the following SMBus write protocols. 14.5.3.1 Write Byte In this operation the master device sends an address byte and one data byte to the slave device, as follows: 1. The master device asserts a START condition. 2. The master sends the 7-bit slave address followed by the write bit (low). 3. The addressed slave device asserts ACK. 4. The master sends a command code (register address). 5. The slave asserts ACK. 6. The master sends the data byte. 7. The slave asserts ACK. 8. The master asserts a STOP condition to end the transaction. 1 2 34 5678 S Slave Address W A Register Address A Data Byte AP 14.5.3.2 Write Word In this operation the master device sends an address byte and two data bytes to the slave device, as follows: 1. The master device asserts a START condition. 2. The master sends the 7-bit slave address followed by the write bit (low). 3. The addressed slave device asserts ACK. 4. The master sends a command code (register address). 5. The slave asserts ACK. 6. The master sends the low data byte. 7. The slave asserts ACK. 8. The master sends the high data byte. 9. The slave asserts ACK. 10. The master asserts a STOP condition to end the transaction. 1 2 34 56 78 910 S Slave Address W A Register Address A Data Byte Low A Data Byte High AP www.national.com 20 |
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