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LM93 датащи(PDF) 51 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
номер детали LM93
подробное описание детали  Hardware Monitor with Integrated Fan Control for Server Management
PDF  92 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM93 датащи(HTML) 51 Page - National Semiconductor (TI)

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16.0 Registers (Continued)
16.5.7 Register 4Eh
H_GPI Error Status
Register
Address
Read/
Write
Register
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Default
Value
4Eh
RWC
H_GPI
Error Status
GPI7
_ERR
GPI6
_ERR
GPI5
_ERR
GPI4
_ERR
GPI3
_ERR
GPI2
_ERR
GPI1
_ERR
GPI0
_ERR
00h
Bit
Name
R/W
Description
Sleep
Masking
0
GPI0_ERR
RWC This bit is set whenever GPIO0 is driven low (unless masked via the GPI
Error Mask register).
S1*, S3*, S4/5*
1
GPI1_ERR
RWC This bit is set whenever GPIO1 is driven low (unless masked via the GPI
Error Mask register).
S1*, S3*, S4/5*
2
GPI2_ERR
RWC This bit is set whenever GPIO2 is driven low (unless masked via the GPI
Error Mask register).
S1*, S3*, S4/5*
3
GPI3_ERR
RWC This bit is set whenever GPIO3 is driven low (unless masked via the GPI
Error Mask register).
S1*, S3*, S4/5*
4
GPI4_ERR
RWC This bit is set whenever GPIO4 is driven low (unless masked via the GPI
Error Mask register).
S1*, S3*, S4/5*
5
GPI5_ERR
RWC This bit is set whenever GPIO5 is driven low (unless masked via the GPI
Error Mask register).
S1*, S3*, S4/5*
6
GPI6_ERR
RWC This bit is set whenever GPIO6 is driven low (unless masked via the GPI
Error Mask register).
S1*, S3*, S4/5*
7
GPI7_ERR
RWC This bit is set whenever GPIO7 is driven low (unless masked via the GPI
Error Mask register).
S1*, S3*, S4/5*
www.national.com
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