PCM3008

SLAS332 – APRIL 2001

9

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PCM audio interface

Digital audio data is interfaced to the PCM3008 on LRCK (pin 10), BCK (pin 12), DIN (pin 9), and DOUT (pin

8). PCM3008 can accept 16-bit standard format, right-justified 16 bit for DAC and left-justified 16 bit for ADC.

PCM3008 accepts 3 types of BCK and LRCK combination, with 64, 48 or 32 clocks of BCK in one clock of LRCK.

The following figures illustrate audio data input/output format and timing.

Ready

1

1024 1025

1

1024 1025

ZERO

tRSTB

1024 SYSCK

1024 SYSCK

After

Ready

After

Ready

Reset

Reset

Reset

Release

Reset

Release

tADCDLY1

tADCDLY1

tDACDLY1

tDACDLY1

tDACDLY1

VCOM (0.5 VDD)

2.1 V

0 V

VCC

SYSCK

PDAD

PDDA

Internal

Reset

ADC

DOUT

DAC

VO

SYMBOL

DEFINITION

MIN

TYP

MAX

UNIT

tRSTB

PDAD = LOW and PDDA = LOW pulse width

40

ns

tADCDLY1 Initial delay time

2240/fs

s

tDACDLY1 Fade in, fade out time

2080/fs

s

Figure 3. Power-On Reset Timing

LRCK

BCK

DIN

MSB

LSB

MSB

LSB

BCK

LRCK

Right-Channel

DOUT

MSB

LSB

MSB

LSB

16

1

2

3

14 15 16

1

2

3

14 15 16

14 15 16

12

3

14 15 16

12

3

1

DAC: 16-Bit, MSB-First, Right-Justified

ADC: 16-Bit, MSB-First, Left-Justified

Right-Channel

Left-Channel

Left-Channel

Figure 4. Audio Data Input/Output Format