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2:1

MUX

PRBS

Generator

10Bit

Registers

TD(0−9)

PRBSEN

LOOPEN

Parallelto

Serial

PhaseGenerator

Clock

REFCLK

Control

Logic

MODESEL

ENABLE

TESTEN

Interpolator

and

ClockExtraction

PRBS

Verification

SerialtoParallel

and

CommaDetect

Clock

RBC1

RBC0

SYNC/PASS

RD(0−9)

SYNCEN

RBCMODE

JTAG

Control

Register

JTMS

JTRSTN

JTDI

TCK

JTDO

2:1

MUX

2:1

MUX

Clock

Data

TXP

TXN

RXP

RXN

LOS

TLK2201A

TLK2201AI

SLLS572B – JUNE 2003 – REVISED SEPTEMBER 2007

BLOCK DIAGRAM

TERMINAL FUNCTIONS

TERMINAL

I/O

DESCRIPTION

NAME

NO.

SIGNAL

Differential output transmit. TXP and TXN are differential serial outputs that interface to a copper

TXP

62

PECL

or an optical I/F module. TXP and TXN are put in a high-impedance state when LOOPEN is high

TXN

61

O

and are active when LOOPEN is low.

RXP

54

PECL

Differential input receive. RXP and RXN together are the differential serial input interface from a

copper or an optical I/F module.

RXN

52

I

REFCLK

22

I

Reference clock. REFCLK is an external input clock that synchronizes the receiver and transmitter

interface (100 MHz to 160 MHz). The transmitter uses this clock to register the input data

(TD0-TD9) for serialization.

In the TBI mode that data is registered on the rising edge of REFCLK.

In the DDR mode, the data is registered on both the rising and falling edges of REFCLK with the

most significant bits aligned to the rising edge of REFCLK.

TD0–TD9

2–4, 6–9,

I

Transmit data. When in the TBI mode (MODESEL = low) these inputs carry 10-bit parallel data

11–13

output from a protocol device to the transceiver for serialization and transmission. This 10-bit

parallel data is clocked into the transceiver on the rising edge of REFCLK and transmitted as a

serial stream with TD0 sent as the first bit.

When in the DDR mode (MODESEL = high) only TD0-TD4 are valid. The 5-bit parallel data is

clocked into the transceiver on the rising and falling edge of REFCLK and transmitted as a serial

stream with TD0 sent as the first bit.

Copyright © 2003–2007, Texas Instruments Incorporated

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