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LP8727 датащи(PDF) 5 Page - Texas Instruments

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номер детали LP8727
подробное описание детали  Micro/Mini USB Interface with Integrated 28V Charger
PDF  33 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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LP8727 датащи(HTML) 5 Page - Texas Instruments

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LP8727
www.ti.com
SNVS898A – OCTOBER 2012 – REVISED MAY 2013
ESD Rating
(1)
VBUS, VBAT, D+ D
−, ID
IEC61000-4-2 In-module
±8kV Contact Discharge
Testing @ USB Connector
±15kV Air Discharge
Human Body
±2 kV
Machine Model
±150V
(1)
The human-body model is 100 pF discharged through 1.5 k
Ω. The machine model is a 200 pF capacitor discharged directly into each
pin, MIL-STD-883 3015.7.
Thermal Properties
Junction-to-Ambient Thermal Resistance (
θJA)
(1)
46°C
Thin DSBGA-25
(1)
Junction-to-ambient thermal resistance is highly application and board layout dependent. In applications where high power dissipation
exists, special care must be given to thermal dissipation issues in board design.
Electrical Characteristics
(1) (2)
Limits in standard typeface are for TJ = 25°C. Limits in boldface type apply over the operating ambient temperature range
(
−40°C ≤ TJ ≤ +125°C). Unless otherwise noted, specifications apply to the Typical Application Circuit with VVBAT = 3.7V,
VVBUS = 5V.
Symbol
Parameter
Conditions
Typ
Min
Max
Units
VVBAT
VBAT Voltage Range
2.5
5.5
V
VVBUS
VBUS Voltage Range
3.5
7
VVBUS = 5V
4.2
VCC
Internal Supply Voltage
VVBUS = 0V
VVBAT
VSWPOS
Positive Switch Regulator
VVBAT > 3.6 or VVBUS > 3.6
3.4
3.3
3.6
V
VSWNEG
Negative Switch Regulator
VVBAT > 3.6 or VVBUS > 3.6
−1.8
−2.0
−1.7
UNDERVOLTAGE LOCKOUT
VBUS Rising (Default)
3.9
3.7
4.1
Undervoltage Lockout
UVLOVBUS
Threshold range
VBUS Falling (Default)
3.7
3.5
3.9
V
VBAT Rising (Default)
2.9
2.7
3.1
Undervoltage Lockout
UVLOVBAT
Threshold range
VBAT Falling (Default)
2.7
2.5
2.9
QUIESCENT CURRENTS
CP_EN = ADC_EN = SEMREM = 0
IVBAT (STBY)
VBAT Standby Iq
3.8
20
USB_DET_DIS = 1
Register Default @ VVBAT = 3.7V
IVBAT (SUP1)
VBAT Supply Current1
42
90
VVBUS = 0V
Register Default @ VVBAT = 3.7V
IVBAT (SUP2)
VBAT Supply Current2
ADC_EN = SEMREM = 1, VVBUS =
60
120
µA
0V
CP_EN = ADC_EN = SEMREM = 0
IVBUS (STBY)
VBUS Standby Iq
USB_DET_DIS = CHG_OFF = 1,
90
200
EXPDET_EN = 0
Register Default @VVBUS = 5V, No
IVBUS (SUP)
VBUS Supply Current
250
400
load on VBAT (No battery)
LOGIC AND CONTROL INPUTS
SDA, SCL
0.4
VIL
Input Low Level
V
DSS
0.4
SDA, SCL
1.4
VIH
Input High Level
V
DSS
1.4
All logic inputs
ILEAK
Input Current
-5
+5
µA
Over pin Voltage range
DSSIN
Input Resistance(2)
DSS Pulldown Resistor to GND
300
k
(1)
All voltages are with respect to the potential at the GND pin.
(2)
Min and Max limits are specified by design, test or statistical analysis. Typical numbers are not ensured, but do represent the most likely
norm.
Copyright © 2012–2013, Texas Instruments Incorporated
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Product Folder Links: LP8727



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