LP8551TLXSLASHNOPB datasheet(37/47 Pages) TI1

37 / 47 page

LP8551

www.ti.com

SNVS673E – APRIL 2010 – REVISED SEPTEMBER 2014

9.2.2.1 Design Requirements

DESIGN PARAMETER

EXAMPLE VALUE

Input voltage range, VBATT

2.7 V to VOUT

5-V input rail, VLDO/VIN

4.5 V to 5.5 V, 10 mA

Brightness Control

PWM input duty cycle (default), I2C can be used as well

PWM output frequency

With RFSET resistor 85 kΩ to100 kΩ; 9.8 kHz with PSPWM enabled

LED Current

With RISET resistor 15 kΩ; 25 mA / channel

Brightness slopes

200-ms linear slope + advanced slope

External set resistors

Enabled

Inductor

10 µH to 33 µH, with 2.5-A saturation current

Boost SW frequency

625 kHz

SW current limit

2.5 A

9.2.2.2 Detailed Design Procedure

Component selection follows Detailed Design Procedure section above. VLDO capacitor voltage rating can be set

based on the 5-V rail voltage specification, which must be <5.5 V in all cases. Note that UVLO is detected from

the VIN pin voltage, not from the VBATT voltage.

9.2.2.3 Application Curves

Typical Boost and LED current behavior is seen in the Application Curves section.

10 Power Supply Recommendations

The device is designed to operate from an input voltage supply range between 2.7 V and 22 V. This input supply

should be well regulated and able to withstand maximum input current and maintain stable voltage without

voltage drop even at load transition condition (start-up or rapid brightness change). The resistance of the input

supply rail should be low enough that the input current transient does not cause drop high enough in the LP8551

supply voltage that can cause false UVLO fault triggering.

If a separate 5-V power rail is used to power LP8551 VLDO/VIN pins, this voltage must be stable 4.5 V to 5 V.

Excessive noise or ripple in this rail can have adverse effect on device performance, so good grounding and

sufficient bypass capacitors must be used.

If the input supply is located more than a few inches from the LP8551 additional bulk capacitance may be

required in addition to the ceramic bypass capacitors. Depending on device EPROM configuration and usage

case the boost converter is configured to operate optimally with certain input voltage range. Examples are seen

in the Detailed Design Procedure section. In uncertain cases, it is recommended to contact a TI Sales

Representative for confirmation of the compatibility of the use case, EPROM configuration, and input voltage

range.

Submit Documentation Feedback

Product Folder Links: LP8551

LP8551TLX/NOPB датащи(PDF) 37 Page - Texas Instruments

LP8551TLX/NOPB датащи(HTML) 37 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47

датащи скачать

ссылки URL