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DS1822 датащи(PDF) 2 Page - Dallas Semiconductor |
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DS1822 датащи(HTML) 2 Page - Dallas Semiconductor |
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2 / 20 page ![]() DS1822 2 of 20 DETAILED PIN DESCRIPTIONS Table 1 8-PIN SO* TO-92 SYMBOL DESCRIPTION 5 1 GND Ground. 42 DQ Data Input/Output pin. Open-drain 1-Wire interface pin. Also provides power to the device when used in parasite power mode (see “Parasite Power” section). 33 VDD Optional VDD pin. VDD must be grounded for operation in parasite power mode. *All pins not specified in this table are “No Connect” pins. OVERVIEW Figure 1 shows a block diagram of the DS1822, and pin descriptions are given in Table 1. The 64-bit ROM stores the device’s unique serial code. The scratchpad memory contains the 2-byte temperature register that stores the digital output from the temperature sensor. In addition, the scratchpad provides access to the 1-byte upper and lower alarm trigger registers (TH and TL), and the 1-byte configuration register. The configuration register allows the user to set the resolution of the temperature-to-digital conversion to 9, 10, 11, or 12 bits. The TH, TL and configuration registers are NV (EEPROM), so they will retain data when the device is powered down. The DS1822 uses Dallas’ exclusive 1-Wire bus protocol that implements bus communication using one control signal. The control line requires a weak pullup resistor since all devices are linked to the bus via a 3-state or open-drain port (the DQ pin in the case of the DS1822). In this bus system, the microprocessor (the master device) identifies and addresses devices on the bus using each device’s unique 64-bit code. Because each device has a unique code, the number of devices that can be addressed on one bus is virtually unlimited. The 1-Wire bus protocol, including detailed explanations of the commands and “time slots,” is covered in the 1-WIRE BUS SYSTEM section of this data sheet. Another feature of the DS1822 is the ability to operate without an external power supply. Power is instead supplied through the 1-Wire pullup resistor via the DQ pin when the bus is high. The high bus signal also charges an internal capacitor (CPP), which then supplies power to the device when the bus is low. This method of deriving power from the 1-Wire bus is referred to as “parasite power.” As an alternative, the DS1822 may also be powered by an external supply on VDD. DS1822 BLOCK DIAGRAM Figure 1 VPU 4.7K POWER SUPPLY SENSE 64-BIT ROM AND 1-wire PORT DQ VDD INTERNAL VDD CPP PARASITE POWER CIRCUIT MEMORY CONTROL LOGIC SCRATCHPAD 8-BIT CRC GENERATOR TEMPERATURE SENSOR ALARM HIGH TRIGGER (TH) REGISTER (EEPROM) ALARM LOW TRIGGER (TL) REGISTER (EEPROM) CONFIGURATION REGISTER (EEPROM) GND DS1822 |
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