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LP5551 датащи(PDF) 2 Page - Texas Instruments |
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LP5551 датащи(HTML) 2 Page - Texas Instruments |
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2 / 38 page ![]() Top View LDO2 LDO4 LD01 LDO3 GND PGND2 PGND2 FB2 VPWELL VNWELL LP5551 LLP-36 PGND1 PGND1 FB1 NC NC NC SCAN NC 36 35 34 33 32 31 30 29 28 10 11 12 13 14 15 16 17 18 SCLK SPWI FB_AVS SW_AVS VO4 VO2 VBAT ENABLE PWROK RESETN PLL Embedded Memory Advanced Power Controller (APC) LP5551 VO3 PWI AVS Hardware Performance Monitor (HPM) Processor Core AVS/DVS domain I/O Ring Slave Power Controller (SPC) LDO4 LDO1 LDO3 SW_AVS SoC LDO2 Hardware Accelerator or 2 nd Processor Core SW_DVS N-WELL P-WELL VO1 User Defined P-Well Substrate N-Well Substrate FB_DVS SW_DVS LP5551 SNVS417B – DECEMBER 2006 – REVISED APRIL 2013 www.ti.com System Diagram Figure 1. System Diagram Connection Diagram Figure 2. LP5551 Pinout 36 - Pin WQFN Package See Package Number NJK0036A Note: The actual physical placement of the package marking will vary from part to part. 2 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LP5551 |
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