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LP5523 датащи(PDF) 45 Page - Texas Instruments |
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LP5523 датащи(HTML) 45 Page - Texas Instruments |
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45 / 56 page ![]() LP5523 INPUT CURRENT 1 mA/DIV PWM POWERSAVE ENABLED INPUT CURRENT ~50 éA DURING PWM POWERSAVE LED CURRENT 5 mA/DIV TIME 1 ms/DIV LP5523 www.ti.com SNVS550D – SEPTEMBER 2009 – REVISED MAY 2013 PWM Power-Save Mode PWM cycle power-save mode is enabled when register 36 bit [2] PWM_PS_EN is set to “1”. In PWM power-save mode analog blocks are powered down during the "down time" of the PWM cycle. Which blocks are powered down depends whether the external or internal clock is used. While the Automatic Power-Save Mode (see above) saves energy when there is no PWM activity at all, the PWM Power-Save mode saves energy during PWM cycles. Like the Automatic Power-Save Mode, PWM Power-Save Mode also works during program execution. Figure 27 shows the principle of the PWM power-save technique. An LED on D9 output is driven at 50%PWM, 5mA current (top waveform). After PWM Power-save enable, the LED-current remains the same, but the LP5523 input current drops down to ~50 µA level when the LED is OFF, or to ~200 µA level when the charge-pump-powered output(s) are used. Figure 27. PWM Power-save Principle. External Clock, VDD = 3.6V Copyright © 2009–2013, Texas Instruments Incorporated Submit Documentation Feedback 45 Product Folder Links: LP5523 |
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