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CS5516 датащи(PDF) 24 Page - Cirrus Logic

номер детали CS5516
подробное описание детали  16BIT/20-BIT BRIDGE TRANSDUCER A/D CONVERTER
PDF  41 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS5516 датащи(HTML) 24 Page - Cirrus Logic

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background image
pling is shown on the system connection dia-
grams.
If absolute measurements are to be made by the
CS5516/20, then a precision reference should be
input into the VREF+ and VREF- terminals.
Clock Generator
The CS5516/20 includes a gate which can be
connected as a crystal oscillator to provide the
master clock to run the chip. Alternatively, an
external (CMOS compatible) clock can be input
into the XIN pin. Figure 10 illustrates a simple
model for the on-chip gate oscillator. The on-
chip oscillator is designed to typically operate
with crystal frequencies between 4.0 and 5.0
MHz without additional loading capacitors.
If
other crystal frequencies, or if ceramic resona-
tors are used, additional loading capacitance may
be necessary.
The XOUT pin can be used to drive one CMOS
gate for system clock requirements. Be sure to
include the gate’s input capacitance and stray ca-
pacitance as part of the loading capacitance for
the resonating element.
Digital Filter
The CS5516/20 is optimized to operate with clock
frequencies of 4.096 MHz or 4.9152 MHz. These
result in the filter having a 3dB bandwidth of 12
Hz or 15 Hz, with output word rates of 50 or
60 Sps. The rejection at 50Hz
± 3Hz is 70 dB mini-
mum with a 4.096 MHz clock. Similar rejection is
obtained at 60 Hz with a 4.9152 MHz clock.
The digital filter has a deep notch in its transfer
function at 50 Hz (XIN = 4.096 MHz) or 60 Hz
(XIN = 4.9152 MHz) but other XIN frequencies
can be used. The filter transfer function will
scale proportionally. Figure 11 shows the trans-
fer function of the filter when operated at three
different frequencies. With a 3.579 MHz XIN,
the filter offers greater than 90 dB rejection of
both 50 and 60 Hz.
The output word rate of the converter scales
with the XIN clock rate and is set by the ratio of
XIN/81,920; or 50 Sps for XIN = 4.096 MHz. If
very narrow signal bandwidths, such as 3 Hz,
are desired, averaging of the output words is rec-
ommended.
>1M
To Internal circuitry
400
XOUT
5pF
1pF
23
22
400
External XTAL
1pF
5pF
XIN
m
g
≅ 2000 umhos
Figure 10. On-Chip Gate Oscillator Model
Input Frequency (Hz)
-160
-140
-120
-100
-80
-60
-40
-20
0
(1) XIN = 3.579 MHz
(2) XIN = 4.096 MHz
(3) XIN = 4.915 MHz
0
0
0
21.8
25
30
43.7
50
60
87.3
100
120
131.0
150
180
174.7
200
240
218.5
250
300
Figure 11. Filter Magnitude Response
0
5
10
15
20
25
30
35
40
45
50
Input Frequency (Hz)
-180
-150
-120
-90
-60
-30
0
30
60
90
120
150
180
XIN = 4.096 MHz
Figure 12. Filter Phase Response.
CS5516, CS5520
24
DS74F1
24
DS74F2



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