LP2998MASLASHNOPB datasheet(18/33 Pages) TI1

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VTT

LP2998

PVIN

VDDQ

VREF

AVIN

VSENSE

GND

CIN

COUT

CREF

AVIN = 2.5V

VDDQ = 1.8V

VTT = 0.9V

VREF = 0.9V

LP2998

VDDQ

VDD

VTT

PVIN

VDDQ

GND

AVIN

VSENSE

COUT

CIN

LP2998

VDDQ

VDD

VTT

PVIN

VDDQ

GND

AVIN

VSENSE

COUT

CIN

LP2998, LP2998-Q1

SNVS521K – DECEMBER 2007 – REVISED AUGUST 2014

www.ti.com

Typical Application (continued)

9.2.4 Level Shifting

If standards other than SSTL-2 are required, such as SSTL-3, it may be necessary to use a different scaling

factor than 0.5 times VDDQ for regulating the output voltage. Several options are available to scale the output to

any voltage required. One method is to level shift the output by using feedback resistors from VTT to the VSENSE

pin. This has been illustrated in Figure 26 and Figure 27. Figure 26 shows how to use two resistors to level shift

VTT above the internal reference voltage of VDDQ/2. To calculate the exact voltage at VTT the following equation

can be used.

VTT = VDDQ/2 ( 1 + R1/R2)

(11)

Figure 26. Increasing VTT by Level Shifting

Conversely, the R2 resistor can be placed between VSENSE and VDDQ to shift the VTT output lower than the

internal reference voltage of VDDQ/2. The equations relating VTT and the resistors can be seen below:

VTT = VDDQ/2 (1 - R1/R2)

(12)

Figure 27. Decreasing VTT by Level Shifting

9.2.4.1 Output Capacitor Selection

For applications utilizing the LP2998 to terminate SSTL-2 I/O signals the typical application circuit shown in

Figure 28 can be implemented.

Figure 28. Typical SSTL-2 Application Circuit

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