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THS789PFD датащи(PDF) 4 Page - Texas Instruments |
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THS789PFD датащи(HTML) 4 Page - Texas Instruments |
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4 / 34 page ![]() THS789 SLOS776A – SEPTEMBER 2012 – REVISED DECEMBER 2015 www.ti.com Pin Functions PIN TYPE DESCRIPTION NAME NO. EventA 68 LVDS-compatible input Positive event input for channel A EventA 66 LVDS-compatible input Negative event input for channel A EventB 61 LVDS-compatible input Positive event input for channel B EventB 63 LVDS-compatible input Negative event input for channel B EventC 8 LVDS-compatible input Positive event input for channel C EventC 10 LVDS-compatible input Negative event input for channel C EventD 15 LVDS-compatible input Positive event input for channel D EventD 13 LVDS-compatible input Negative event input for channel D 1, 2, 11, 12, 21, 25, 32, 35, 37, 39, GND 42, 55, 64, 65, 74, 75, 82, 84, 85, Ground Chip ground 87, 89, 92, 94 HCLK 34 LVCMOS input Host serial-interface clock Hdata 33 LVCMOS I/O Host serial-interface data I/O Hstrobe 41 LVCMOS input Host serial-interface chip select MCLK 19 LVDS-compatible input Positive master-clock input MCLK 20 LVDS-compatible input Negative master-clock input 3–6, 9, 14, 17, 18, 26, 50, 54, 59, NC No connect Physically not connected to silicon 62, 67, 70–73, 76, 100 OT_ALARM 53 Open-drain output Overtemperature alarm RCLK 45 LVDS-compatible output Positive result-interface clock RCLK 44 LVDS-compatible output Negative result-interface clock RdataA 78 LVDS-compatible output Positive result-data output for channel A RdataA 79 LVDS-compatible output Negative result-data output for channel A RdataB 49 LVDS-compatible output Positive result-data output for channel B RdataB 48 LVDS-compatible output Negative result-data output for channel B RdataC 98 LVDS-compatible output Positive result-data output for channel C RdataC 97 LVDS-compatible output Negative result-data output for channel C RdataD 27 LVDS-compatible output Positive result-data output for channel D RdataD 28 LVDS-compatible output Negative result-data output for channel D Reserved 23, 24, 90, 91 Engineering or test pins Connect to VCC Reset 51 LVCMOS input Chip reset, active-low RstrobeA 80 LVDS-compatible output Positive strobe signal for channel A RstrobeA 81 LVDS-compatible output Negative strobe signal for channel A RstrobeB 47 LVDS-compatible output Positive strobe signal for channel B RstrobeB 46 LVDS-compatible output Negative strobe signal for channel B RstrobeC 96 LVDS-compatible output Positive strobe signal for channel C RstrobeC 95 LVDS-compatible output Negative strobe signal for channel C RstrobeD 29 LVDS-compatible output Positive strobe signal for channel D RstrobeD 30 LVDS-compatible output Negative strobe signal for channel D SYNC 57 LVDS-compatible input Positive input for sync channel SYNC 56 LVDS-compatible input Negative input for sync channel TEMP 52 Analog output Die temperature 7, 16, 22, 31, 36, 38, 40, 43, 58, VCC Power supply Positive supply, nominal 3.3 V 60, 69, 77, 83, 86, 88, 93, 99 4 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: THS789 |
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